Texas Instruments TMS320 DSP manual DMA Guidelines

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DMA Guidelines

Guideline 12 — All C6x algorithms should be supplied in both little- and big-endian formats. (See Section 5.3.1)

Guideline 13 — On processors that support large program model compilations, a version of the algorithm should be supplied that accesses all core run-time support functions as near functions and all algorithms as far functions (mixed model). (See Section 5.4.2)

Guideline 14 — All C55x algorithms should not assume any specific stack configuration and should work under all the three stack modes. (See Section 5.5.1)

A.5 DMA Guidelines

DMA Guideline 1 — The data transfer should complete before the CPU operations executing in parallel (DMA guideline). (See Section 6.6)

DMA Guideline 2 — All algorithms should minimize channel (re)configuration overhead by requesting a dedicated logical DMA channel for each distinct type of DMA transfer it issues, and avoid calling ACPY2 configure and preferring the new fast configuration APIs where possible. (See Section 6.12)

DMA Guideline 3 — To ensure correctness, All C6000 algorithms that implement IDMA2 need to be supplied with the internal memory they request from the client applciation using algAlloc(). (See Section 6.13.1)

DMA Guideline 4 — To facilitate high performance, C55x algorithms should request DMA transfers with source and destinations aligned on 32-bit byte addresses. (See Section 6.14.1)

DMA Guideline 5 — C55x algorithms should minimize channel configuration overhead by requesting a separate logical channel for each different transfer type. They should also call ACPY2_configure when the source or destination addresses belong in a different type of memory (SARAM, DARAM, External) as compared with that of the most recent transfer. (See Section 6.14.2)

SPRU352G –June 2005 –Revised February 2007 Rules and Guidelines 79

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