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General Guidelines
DMA Rule 3 — Each of the IDMA2 methods implemented by an algorithm must be independently relocateable. (See Section 6.7)
DMA Rule 4 — All algorithms must state the maximum number of concurrent DMA transfers for each logical channel. (See Section 6.8)
DMA Rule 5 — All agorithms must characterize the average and maximum size of the data transfers per logical channel for each operation. Also, all algorithms must characterize the average and maximum frequency of data transfers per logical channel for each operation. (See Section 6.8)
DMA Rule 6 — C6000 algorithms must not issue any CPU read/writes to buffers in external memory that are involved in DMA transfers. This also applies to the input buffers passed to the algorithm through its algorithm interface. (See Section 6.13.1)
DMA Rule 7 — If a C6000 algorithm has implemented the IDMA2 interface, all input and output buffers residing in external memory and passed to this algorithm through its function calls, should be allocated on a cache line boundary and be a multiple of the cache line length in size. The application must also clean the cache entries for these buffers before passing them to the algorithm. (See Section 6.13.1)
DMA Rule 8 — For C6000 algorithms, all buffers residing in external memory involved in a DMA transfer should be allocated on a cache line boundary and be a multiple of the cache line length in size. (See Section 6.13.1)
DMA Rule 9 — C6000 Algorithms should not use stack allocated buffers as the source or destination of any DMA transfer. (See Section 6.13.1)
DMA Rule 10 — C55x algorithms must request all data buffers in external memory with
DMA Rule 11 — C55x algorithms must use the same data types, access modes and DMA transfer settings when reading from or writing to data stored in external memory, or in
A.4 General Guidelines
Guideline 1 — Algorithms should minimize their persistent data memory requirements in favor of scratch memory. (See Section 2.3.2)
Guideline 2 — Each initialization and finalization function should be defined in a separate object module; these modules must not contain any other code. (See Section 2.4)
Guideline 3 — All modules that support object creation should support
Guideline 4 — All modules that support object creation should support
Guideline 5 — Algorithms should keep stack size requirements to a minimum. (See Section 4.1.2)
Guideline 6 — Algorithms should minimize their static memory requirements. (See Section 4.1.3)
Guideline 7 — Algorithms should never have any scratch static memory. (See Section 4.1.3)
Guideline 8 — Algorithm code should be partitioned into distinct sections and each section should be characterized by the average number of instructions executed per input sample. (See Section 4.2)
Guideline 9 — Interrupt latency should never exceed 10 μs. (See Section 4.3)
Guideline 10 — Algorithms should avoid the use of global registers. (See Section 5.1)
Guideline 11 — Algorithms should avoid the use of the float data type. (See Section 5.2)
78 | Rules and Guidelines | SPRU352G |
