Texas Instruments TMS3320C5515

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Power Management

Table 1-27. USB System Control Register (USBSCR) Field Descriptions (continued)

Bit Field Value Description

13 USBVBUSDET USBVBUS detect enable. The USB VBUS pin has two comparators that monitor the

voltagelevel on the pin. These comparators can be disabled for power savings when not

needed.

0 USBVBUS detect comparator is disabled.

1 USBVBUS detect comparator is enabled.

12 USBPLLEN USBPLL enable. This is normally only used for test purposes.

0 NormalUSB operation.

1 OverrideUSB suspend end behavior and force release of PLL from suspend state.

11-7 Reserved 0 Reserved.Always write 0 to these bits.

6 USBDATPOL USB data polarity bit. Changing this bit can be useful since the data polarity is opposite

ontype-A and type-B connectors.

0 Reversepolarity on DP and DM signals.

1 Normalpolarity (normal polarity matching pin names).

5-4 Reserved 0 Reserved.

3 USBOSCBIASDIS USBinternal oscillator bias resistor disable.

0 Internaloscillator bias resistor enabled (normal operating mode).

1 Internaloscillator bias resistor disabled. Disabling the internal resistor is primarily for

productiontest purposes. But it can also be used when an external oscillator bias resistor

isconnected between the USB_MXI and USB_MXO pins (but this is not a recommended

configuration).

2 USBOSCDIS USBoscillator disable bit.

0 USBinternal oscillator enabled.

1 USBinternal oscillator disabled. Causes the USB_MXO pin to be tristated and the

oscillator'sclock into the core is forced low.

1-0 BYTEMODE USBbyte mode select bits.

0 Wordaccesses by the CPU are allowed.

1h Byte accesses by the CPU are allowed (high byte is selected).

2h Byte accesses by the CPU are allowed (low byte is selected).

3h Reserved.

1.5.3.5 RTCDomain Clock Gating

Dynamic RTC domain clock gating is not supported. Note that the RTC oscillator, and by extension the

RTC domain, can be permanently disabled by not connecting a crystal and tying off the RTC oscillator

pins. However, in this configuration, the RTC must still be powered and the RTC registers starting at I/O

address 1900h will not be accessible. This includes the RTC Power Management Register (RTCPMGT)

that provides powerdown control to the on-chip LDO and control of the WAKEUP and RTC_CLKOUT pins.

See the device-specific data manual for more details on permanently disabling the RTC oscillator.

SPRUFX5A–October 2010 –Revised November 2010 SystemControl

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