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System Configuration and Control

1.7.3.5Pull-Up/Pull-Down Inhibit Register (PDINHIBR1, PDINHIBR2, and PDINHIBR3 [1C17h, 1C18h, and 1C19h]

The device allows you to individually enable or disable the internal pull-up and pull-down resistors. You can individually inhibit the pull-up and pull-down resistors of the I/O pins through the pull-down/up inhibit registers (PDINHIBRn). There is one pin, TRSTN, that has a pulldown that is permanently enabled and cannot be disabled.

The pull-down inhibit register 1 (PDINHIBR1) is shown in Figure 1-39and described in Table 1-49.

Figure 1-39. Pull-Down Inhibit Register 1 (PDINHIBR1) [1C17h]

15

14

13

12

11

10

9

8

Reserved

 

S15PD

S14PD

S13PD

S12PD

S11PD

S10PD

R-0

 

R/W-1

R/W-1

R/W-1

R/W-1

R/W-1

R/W-1

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

Reserved

 

S05PD

S04PD

S03PD

S02PD

S01PD

S00PD

R-0

 

R/W-1

R/W-1

R/W-1

R/W-1

R/W-1

R/W-1

LEGEND: R/W = Read/Write; R = Read only; -n= value after reset

Table 1-49. Pull-Down Inhibit Register 1 (PDINHIBR1) Field Descriptions

Bit

Field

Value

Description

 

 

 

 

15-14

Reserved

0

Reserved.

 

 

 

 

13

S15PD

 

Serial port 1 pin 5 pull-down inhibit bit. Setting this bit to 1 disables the pin's internal pull-down.

 

 

0

Pin pull-down is enabled.

 

 

1

Pin pull-down is disabled.

 

 

 

 

12

S14PD

 

Serial port 1 pin 4 pull-down inhibit bit. Setting this bit to 1 disables the pin's internal pull-down.

 

 

0

Pin pull-down is enabled.

 

 

1

Pin pull-down is disabled.

 

 

 

 

11

S13PD

 

Serial port 1 pin 3 pull-down inhibit bit. Setting this bit to 1 disables the pin's internal pull-down.

 

 

0

Pin pull-down is enabled.

 

 

1

Pin pull-down is disabled.

 

 

 

 

10

S12PD

 

Serial port 1 pin 2 pull-down inhibit bit. Setting this bit to 1 disables the pin's internal pull-down.

 

 

0

Pin pull-down is enabled.

 

 

1

Pin pull-down is disabled.

 

 

 

 

9

S11PD

 

Serial port 1 pin 1 pull-down inhibit bit. Setting this bit to 1 disables the pin's internal pull-down.

 

 

0

Pin pull-down is enabled.

 

 

1

Pin pull-down is disabled.

 

 

 

 

8

S10PD

 

Serial port 1 pin 0 pull-down inhibit bit. Setting this bit to 1 disables the pin's internal pull-down.

 

 

0

Pin pull-down is enabled.

 

 

1

Pin pull-down is disabled.

 

 

 

 

7-6

Reserved

0

Reserved.

 

 

 

 

5

S05PD

 

Serial port 0 pin 5 pull-down inhibit bit. Setting this bit to 1 disables the pin's internal pull-down.

 

 

0

Pin pull-down is enabled.

 

 

1

Pin pull-down is disabled.

 

 

 

 

4

S04PD

 

Serial port 0 pin 4 pull-down inhibit bit. Setting this bit to 1 disables the pin's internal pull-down.

 

 

0

Pin pull-down is enabled.

 

 

1

Pin pull-down is disabled.

 

 

 

 

3

S03PD

 

Serial port 0 pin 3 pull-down inhibit bit. Setting this bit to 1 disables the pin's internal pull-down.

 

 

0

Pin pull-down is enabled.

 

 

1

Pin pull-down is disabled.

 

 

 

 

SPRUFX5A –October 2010 –Revised November 2010

System Control

67

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Copyright © 2010, Texas Instruments Incorporated

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Texas Instruments TMS3320C5515 manual S15PD S14PD S13PD S12PD S11PD S10PD, S05PD S04PD S03PD S02PD S01PD S00PD
Page 66 Page 68

TMS3320C5515 specifications

The Texas Instruments TMS3320C5515 is a highly specialized digital signal processor (DSP) designed for a wide range of applications, including telecommunications, audio processing, and other signal-intensive tasks. As part of the TMS320 family of DSPs, the TMS3320C5515 leverages TI's extensive experience in signal processing technology, delivering robust performance and reliability.

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Overall, the Texas Instruments TMS3320C5515 stands out as a powerful DSP solution, equipped with features that cater to the needs of various industries. Its combination of performance, efficiency, and versatile application makes it an attractive choice for engineers working in signal processing.
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