Device Clocking

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Figure 1-3. DSP Clocking Diagram

 

 

 

 

CLKSEL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLKIN

 

 

1

CLKREF

 

 

 

 

 

 

ST3_55[CLKOFF]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

System Clock

 

 

 

 

 

 

 

 

 

LS

LS

1

 

CLKOUT

 

 

 

 

 

 

Generator

 

SYSCLK

 

 

 

 

 

0

(1)

 

 

(1)

(2)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

ICR[HWAI]

 

 

 

 

 

 

 

 

 

 

 

 

 

PCGCR1

FFT Hardware

 

 

 

 

 

 

 

 

 

 

 

 

Accelerator

 

 

 

 

 

 

 

 

 

 

 

[SYSCLKDIS]

 

 

 

 

 

RTC Clock

 

 

 

 

 

ICR[MPORTI]

 

 

 

 

(1)

LS

 

 

 

 

CCR2

 

 

RTC_CLKOUT

 

 

 

 

 

 

 

[SYSCLKSEL]

MPORT Clock

 

 

 

 

 

 

 

 

 

 

 

 

RTC_XI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32.768

RTC

 

RTC

 

 

 

 

 

 

PCGCR1[DMA0CG]

ICR[XPORTI]

 

 

KHz

OSC

 

 

 

 

 

 

 

 

XPORT Clock

 

 

 

 

 

 

 

 

 

 

RTC_XO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DMA0

 

ICR[IPORTI]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCGCR2[DMA1CG]

IPORT Clock

 

 

 

 

 

 

 

 

 

 

DMA1

 

ICR[DPORTI]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCGCR2[DMA2CG]

DPORT Clock

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

USBPHYCLK

 

 

 

 

DMA2

 

ICR[CPUI]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCGCR2[DMA3CG]

CPU Clock

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DMA3

 

 

 

 

 

 

USB

 

 

 

 

 

 

 

PCGCR1[EMIFCG]

ECDR[EDIV]

 

 

 

 

PHY

 

 

 

 

 

 

 

 

 

 

 

 

60 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

÷2

0

 

 

 

 

 

 

 

USB

LS

 

 

 

 

 

 

EMIF

 

 

 

 

 

 

Digital

 

(1)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCGCR2[USBCG]

 

1

 

USB_MXI

 

 

 

 

 

 

 

 

 

 

 

 

 

12 MHz

 

 

 

 

 

 

 

 

 

 

 

 

USB

USB

 

 

 

 

 

 

 

 

 

12 MHz

 

 

 

 

 

 

 

 

PCGCR1[SPICG]

 

 

OSC

 

 

PLL

 

 

 

 

PCGCR1[I2CCG]

 

 

 

 

 

 

 

 

 

 

 

 

UDB_MXO

LS

 

 

 

OFF

 

 

 

 

 

 

 

SPI

 

 

 

 

 

 

 

 

 

 

 

 

 

(1)

 

 

 

 

 

 

 

 

I2C

 

PCGCR1[I2S0CG]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCGCR1[UARTCG]

 

 

 

 

 

USBSCR

 

 

 

 

 

 

UART

 

 

I2S0

 

 

[USBOSCDIS]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCGCR1[I2S1CG]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCGCR1[TMR2CG]

 

Timer2

I2S1

 

PCGCR1[TMR1CG]

PCGCR1[I2S2CG]

 

Timer1

I2S2

 

PCGCR1[TMR0CG]

PCGCR1[I2S3CG]

 

Timer0

I2S3

 

 

PCGCR2[SARCG]

SAR

PCGCR2[LCDCG]

LCD Controller

PCGCR1[MMCSD0CG]

MMC/SD0

PCGCR2[ANAREGCG]

PCGCR1[MMCSD1CG] MMC/SD1

Analog

Registers

(1)LS = Level Shifter

(2)The CLKOUT pin'soutput driver is enabled/disabled through the CLKOFF bit of the CPU ST3_55 register. At the beginning of the boot sequence, the on-chip Bootloader sets CLKOFF = 1 and CLKOUT pin is disabled (high-impedance). For more information on the ST3_55 register, see the TMS320C55x 3.0 CPU Reference Guide (SWPU073).

22

System Control

SPRUFX5A –October 2010 –Revised November 2010

 

 

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Copyright © 2010, Texas Instruments Incorporated

Page 22
Image 22
Texas Instruments TMS3320C5515 manual DSP Clocking Diagram

TMS3320C5515 specifications

The Texas Instruments TMS3320C5515 is a highly specialized digital signal processor (DSP) designed for a wide range of applications, including telecommunications, audio processing, and other signal-intensive tasks. As part of the TMS320 family of DSPs, the TMS3320C5515 leverages TI's extensive experience in signal processing technology, delivering robust performance and reliability.

One of the main features of the TMS3320C5515 is its 32-bit architecture, which allows for a high level of precision in digital signal computation. The processor is capable of executing complex mathematical algorithms, making it suitable for tasks that require high-speed data processing, such as speech recognition and audio filtering. With a native instruction set optimized for DSP applications, the TMS3320C5515 can perform multiply-accumulate operations in a single cycle, significantly enhancing computational efficiency.

The TMS3320C5515 employs advanced technologies including a Harvard architecture that separates instruction and data memory, enabling simultaneous access and improving performance. Its dual data buses enhance throughput by allowing multi-channel processing, making it particularly effective for real-time applications where timely data manipulation is critical. The device supports a wide range of peripherals, facilitating connections to various sensors and communication systems, which is vital in embedded applications.

In terms of characteristics, the TMS3320C5515 operates at an impressive clock speed, providing the computational power necessary to handle demanding tasks. The device is optimized for low power consumption, making it ideal for battery-operated applications without sacrificing performance. Its flexibility in processing algorithms also allows it to be readily adapted for specific requirements, from audio codecs to modems.

Another noteworthy aspect is the extensive development ecosystem surrounding the TMS3320C5515, which includes software tools, libraries, and support resources designed to accelerate the development process. This allows engineers and developers to bring their projects to market more quickly while minimizing risk.

Overall, the Texas Instruments TMS3320C5515 stands out as a powerful DSP solution, equipped with features that cater to the needs of various industries. Its combination of performance, efficiency, and versatile application makes it an attractive choice for engineers working in signal processing.