2 Troubleshooting Procedures
Procedure 2 Debugging Port Check
Check the MiniPCI Debug board. The tool for debug port test is shown below.
Figure 2-2 A set of tool for debug port test
The test procedures are follows:
1.Replace Mini PCI debug port with Wireless LAN card, check LED in the Mini PCI debug board
The following is a list of the Test Point codes written to port 80h at the start of each routine, the beep codes issued for terminal errors, and a description of the POST routine. Unless otherwise noted, these codes are valid for Phoenix BIOS 4.0 Release 6.0.
NOTE: The following routines are sorted by their test point numbers were assigned in the BIOS code. Their actual order as executed during POST can
Be quite different.
Code Beeps POST Routine Description
02h | Verify Real Mode |
03h | Disable |
04h | Get CPU type |
06h | Initialize system hardware |
08h | Initialize chipset with initial POST values |
09h | Set IN POST flag |
0Ah | Initialize CPU registers |
0Bh | Enable CPU cache |
0Ch | Initialize caches to initial POST values |
0Eh | Initialize I/O component |
0Fh | Initialize the local bus IDE |
10h | Initialize Power Management |
11h | Load alternate registers with initial POST values |
12h | Restore CPU control word during warm boot |
13h | Initialize PCI Bus Mastering devices |
16 | Satellite P100 Maintenance |
