Philips P89LPC907, P89LPC906, P89LPC908 user manual Kbpatn, Kbcon

Page 77

Philips Semiconductors

User’s Manual - Preliminary -

 

 

 

KEYPAD INTERRUPT (KBI)

P89LPC906/907/908

11. KEYPAD INTERRUPT (KBI)

 

 

The Keypad Interrupt function is intended primarily to allow a single interrupt to be generated when the Port 0 bits are equal to or not equal to a certain pattern. This function can be used for keypad recognition. The user can configure the port via SFRs for different tasks.

There are three SFRs used for this function. The Keypad Interrupt Mask Register (KBMASK) is used to define which input pins connected to Port 0 are enabled to trigger the interrupt. The Keypad Pattern Register (KBPATN) is used to define a pattern that is compared to the value of Port 0. The Keypad Interrupt Flag (KBIF) in the Keypad Interrupt Control Register (KBCON) is set when the condition is matched while the Keypad Interrupt function is active. An interrupt will be generated if it has been enabled by setting the EKBI bit in IEN1 register and EA = 1. The PATN_SEL bit in the Keypad Interrupt Control Register (KBCON) is used to define equal or not-equal for the comparison.

In order to use the Keypad Interrupt as an original KBI function like in the 87LPC76x series, the user needs to set KBPATN = 0FFH and PATN_SEL = 0 (not equal), then any key connected to Port0 which is enabled by KBMASK register will cause the hardware to set KBIF = 1 and generate an interrupt if it has been enabled. The interrupt may be used to wake up the CPU from Idle or Power down modes. This feature is particularly useful in handheld, battery powered systems that need to carefully manage power consumption yet also need to be convenient to use.

In order to set the flag and and cause an interrupt, the pattern on Port 0 must be held longer than 6 CCLKs.

KBPATN

 

7

6

5

4

 

 

3

2

1

 

0

 

 

Address: 93h

 

 

-

KBPATN.6

KBPATN.5

KBPATN.4

 

 

-

-

-

 

-

 

 

Not bit addressable

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset Source(s): Any reset

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset Value: 11111111B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BIT

SYMBOL

FUNCTION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

KBPATN.6,5,4

-

Pattern bits 6,5,4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 11-1: Keypad Pattern Register

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

KBCON

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Address: 94h

 

7

6

5

4

 

 

3

2

1

 

0

 

 

Not bit addressable

 

 

-

 

-

 

-

 

-

 

 

-

 

-

 

PATN_SEL

KBIF

 

Reset Source(s): Any reset

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset Value: xxxxxx00B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BIT

SYMBOL

FUNCTION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

KBCON.7-2

-

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

KBCON.1

PATN_SEL

Pattern Matching Polarity selection. When set, Port 0 has to be equal to the user-defined

 

 

Pattern in KBPATN to generate the interrupt. When clear, Port 0 has to be not equal to the

 

 

value of KBPATN register to generate the interrupt.

 

 

 

 

 

 

 

 

KBCON.0

KBIF

Keypad Interrupt Flag. Set when Port 0 matches user defined conditions specified in

 

 

KBPATN, KBMASK, and PATN_SEL. Needs to be cleared by software by writing "0".

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 11-2: Keypad Control Register

2003 Dec 8

77

Page 76 Page 78
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Contents User Manual Table of Contents Power-On reset code execution Brownout Detection Power-On Detection Power Reduction Modes103 List of Figures List of Figures P89LPC906 PIN ConfigurationsProduct Comparison Logic SymbolsKB Code Flash Block Diagram P89LPC906CPU Oscillator DividerUart Block Diagram P89LPC907Byte Data RAM ClockData RAM Port Block Diagram P89LPC908PIN Descriptions P89LPC906 P1.0 PIN Descriptions P89LPC907TxD P1.2Keyboard Input P1.0 P1.5 PIN Descriptions P89LPC908P1.1 RxDSpecial function registers table P89LPC906 Special function registersMSB LSB Hex Special function registers table P89LPC907 CMP1 Cmpref TRIM.5 TRIM.4 TRIM.3 TRIM.2 TRIM.1 TRIM.0 WDCON# Special function registers table P89LPC908 KB2 KB6 KB5 KB4 TL0 Data Memory OrganizationSFR CodeClock Definitions Enhanced CPUCPU Clock Oscclk LOW Speed Oscillator Option P89LPC906Clock Output P89LPC906 Oscillator Option SELECTION- P89LPC906ON-CHIP RC Oscillator Option Watchdog Oscillator OptionBIT Symbol Function CPU Clock Cclk Wakeup DelayExternal Clock Input Option P89LPC906 CPU Clock Cclk Modification Divm RegisterHigh freq LOW Power Select P89LPC906Med freq Low freqCPU Clocks Interrupt Priority Structure Flag Bits Address Enable Bits Priority RankingSummary of Interrupts P89LPC906 Description Interrupt ArbitrationExternal Interrupt PIN Glitch Suppression External Interrupt InputsSummary of Interrupts P89LPC907,P89LPC908 Description TI & RIBopd EBO Rtcf Kbif Interrupts QUASI-BIDIRECTIONAL Output Configuration Port ConfigurationsNumber of I/O Pins Available Clock Source Reset Option RSTPort latch data Open Drain Output ConfigurationPUSH-PULL Output Configuration INPUT-ONLY ConfigurationPort 0 Analog Functions Strong Port latch data Port pin Input data Glitch rejectionPort Output Configuration P89LPC908 Port Output Configuration P89LPC906Port Output Configuration P89LPC907 Ports Ports TMOD.7 TmodTMOD.6 TMOD.3Mode Overflows. ModeTamod P89LPC907 TAMOD.7-1Tcon T0C/T = Overflow TLn THn TFn Interrupt T0 Pin PclkT0C/T = Overflow THn TFnTR0 ENT0 Pclk TH0 Timer Overflow Toggle Output P89LPC907Pclk TL0 Timers 0 REAL-TIME Clock Source UCFG1.2 UCFG1.1 UCFG1.0 Cclk Frequency RTC Clock Frequency FOSC2 FOSC1 FOSC0 RTCS10Xclk Divm CclkWDT Oscillator/DIVM RC Oscillator/DIVMUndefined External clock/DIVMREAL-TIME Clock INTERRUPT/WAKE UP Reset Sources Affecting the REAL-TIME ClockChanging RTCS1-0 Rtccon REAL-TIME CLOCK/SYSTEM Timer Brownout Detection Brownout Options POWER-ON DetectionPower Reduction Modes Power Reduction Modes Pcon Pcona Power Monitoring Functions Modes UartBaud Rate Generator and Selection SFR SpaceUpdating the BRGR1 and BRGR0 Sfrs SFR Locations for UARTsBrgcon Framing ErrorBreak Detect Scon Sstat More about Uart ModeSerial Port Mode 0 Double Buffering Must Be Disabled FE and RI when SM2 = 1 in Modes 2 Framing Error and RI in Modes 2 and 3 with SM2 =More about Uart Modes 2 PCON.6 RB8 SMOD0Double Buffering in Different Modes Double BufferingTransmission with and without Double Buffering 9TH BIT BIT 8 in Double Buffering Modes 1, 2Automatic Address Recognition Multiprocessor CommunicationsUart Uart Block Diagram of Reset POWER-ON Reset Code ExecutionRstsrc Comparator Configuration Internal Reference Voltage Comparator and Power Reduction Modes Comparator Interrupt CIN1A CO1 CMP1 CmprefComparator Configuration Example Analog Comparators Kbcon KbpatnKbmask Wdte Wdse Function Watchdog timer configurationWatchdog Function Feed Sequence Wdcon PRE2-PRE0 P89LPC906/907/908 Watchdog Timeout ValuesPrescaler Reset Pclk Watchdog Timer in Timer ModeWatchdog Control registerWatchdog Clock Source Power Down OperationPrescaler CLKWatchdog Timer Watchdog Timer AUXR1 Software ResetDual Data Pointers Move code byte relative to Dptr to the accumulator MOVCA, @A+DPTRMOVXA, @DPTR MOVX@DPTR, aUsing Flash AS Data Storage FeaturesGeneral Description Introduction to IAP-LITEFlash Program Memory Fmcon Assembly language routine to erase/program all or part of a Accessing Additional Flash ElementsUCFG1 ERASE-PROGRAMMING Additional Flash ElementsReading Additional Flash Elements Fmadrl Conf P89LPC906 User Configuration BytesUCFG1 SECx User Security BytesAddress xxxxh Unprogrammed value 00hBootstat BootvecLogical ArithmeticData Transfer Mnemonic Description Bytes Cycles Hex CodeBranching BooleanB8-BF RetiD8-DF Miscellaneous2003 Dec Initial release 104 Index Dual Data Pointers Port 0 12, 13 SFR 109 P89LPC906/907/908
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