
Functional Overview
Synchronous burst write in
Table 2-18 and Table 2-19 list the smc_opmode0_<0-3> and SRAM Register settings.
Table
Field | mw | rd_sync | rd_bl | wr_sync | wr_bl | baa | adv | bls | ba |
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Value | - | - | - | b1 | <burst length> | - | b1 | - | - |
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Table
Field | t_rc | t_wc | t_ceoe | t_wp | t_pc | t_tr |
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Value | - | b0100 | - | b001 | - | - |
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Figure 2-22 shows the same synchronous burst write as Figure 2-21 on page 2-35, but in multiplexed-mode.
VPFBPFON
VPFBIEFONBLQB
W:&
VPFBFVBQB>@
VPFBDGYBQB
W:3
VPFBZHBQB
VPFBGDWDBRXWB>@ $'
' '
VPFBGDWDBHQB
VPFBZDLWB
ZDLWBUHJBIEFON
ZDLWBUHJBPFON
Figure 2-22 Synchronous burst write in multiplexed-mode
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