
Programmer’s Model
3.3.2SMC Memory Interface Configuration Register at 0x1004
The
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8QGHILQHG | 5HVHUYHG |
H[FOXVLYHBPRQLWRUV
UHPDS
PHPRU\BZLGWK
PHPRU\BFKLSV
PHPRU\BW\SH
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| Table | ||
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| Table |
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Bits | Name | Function | |
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[31:18] | - | Reserved, read undefined. | |
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[17:16] | exclusive_monitors | Returns the number of exclusive access monitor resources that are implemented in the | |
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| SMC: | |
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| b00 | = 0 monitors |
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| b01 | = 1 monitors |
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| b10 | = 2 monitors |
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| b11 | = 4 monitors. |
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[15:7] | - | Reserved, read undefined. | |
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[6] | remap0 | Returns the value of the smc_remap0 input. | |
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[5:4] | memory_width0 | Returns the maximum width of the SMC memory data bus for interface 0: | |
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| b00 | = 8 bits |
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| b01 | = 16 bits |
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| b10 | = 32 bits |
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| b11 | = Reserved. |
ARM DDI 0389B | Copyright © 2006 ARM Limited. All rights reserved. |