Cypress CY8CNP102B, CY8CNP102E manual AC Electrical Characteristics, DC24M

Page 17

PRELIMINARY CY8CNP102B, CY8CNP102E

AC Electrical Characteristics

The following AC electrical specifications list the guaranteed maximum and minimum specifications for the voltage and temperature range: 3.0V to 3.6V over the temperature range of -40°C TA 85°C. Typical parameters apply to 3.3V at 25°C and are for design guidance only.

AC Chip Level Specifications

Table 14. 3.3V AC Chip Level Specifications (CY8CNP102B)

Symbol

Description

Min

Typ

Max

Units

Notes

FIMO24

Internal Main Oscillator Frequency for

23.4

24

24.6[4, 5, 6]

MHz

Trimmed for 3.3V operation using

 

24 MHz

 

 

 

 

factory trim values. See the figure

 

 

 

 

 

 

on page 10. SLIMO Mode = 0.

FIMO6

Internal Main Oscillator Frequency for

5.75

6

6.35[4 , 5, 6]

MHz

Trimmed for 3.3V operation using

 

6 MHz

 

 

 

 

factory trim values. See the figure

 

 

 

 

 

 

on page 10.

 

 

 

 

 

 

SLIMO Mode = 1.

FCPU2

CPU Frequency (3.3V Nominal)

0.93

12

12.3[5, 6]

MHz

 

F48M

Digital PSoC Block Frequency

0

48

49.2[4, 5, 7]

MHz

Refer to section AC Digital Block

 

 

 

 

 

 

Specifications on page 19.

F24M

Digital PSoC Block Frequency

0

24

24.6[5, 7]

MHz

 

F32K1

Internal Low Speed Oscillator Frequency

15

32

64

kHz

 

F32K2

External Crystal Oscillator

32.768

kHz

Accuracy is capacitor and crystal

 

 

 

 

 

 

dependent. 50% duty cycle.

FPLL

PLL Frequency

23.986

MHz

A multiple (x732) of crystal

 

 

 

 

 

 

frequency.

Jitter24M2

24 MHz Period Jitter (PLL)

600

ps

 

 

 

 

 

 

 

 

TPLLSLEW

PLL Lock Time

0.5

10

ms

 

TPLLSLEWLOW

PLL Lock Time for Low Gain Setting

0.5

50

ms

 

TOS

External Crystal Oscillator Startup to 1%

250

500

ms

 

TOSACC

External Crystal Oscillator Startup to

300

600

ms

The crystal oscillator frequency is

 

100 ppm

 

 

 

 

within 100 ppm of its final value

 

 

 

 

 

 

by the end of the Tosacc period.

 

 

 

 

 

 

Correct operation assumes a

 

 

 

 

 

 

properly loaded 1 uW maximum

 

 

 

 

 

 

drive level 32.768 kHz crystal.

Jitter32k

32 kHz Period Jitter

100

 

ns

 

 

 

 

 

 

 

 

TXRST

External Reset Pulse Width

10

μs

 

DC24M

24 MHz Duty Cycle

40

50

60

%

 

 

 

 

 

 

 

 

Step24M

24 MHz Trim Step Size

50

kHz

 

 

 

 

 

 

 

 

Fout48M

48 MHz Output Frequency

46.8

48.0

49.2[4,6]

MHz

Trimmed. Using factory trim

 

 

 

 

 

 

values.

Jitter24M1

24 MHz Period Jitter (IMO)

600

 

ps

 

 

 

 

 

 

 

 

FMAX

Maximum frequency of signal on row input

12.3

MHz

 

 

or row output.

 

 

 

 

 

TRAMP

Supply Ramp Time

0

μs

 

Notes

4.4.75V < Vcc < 5.25V.

5.Accuracy derived from Internal Main Oscillator with appropriate trim for Vcc range.

6.3.0V < Vcc < 3.6V. See Application Note AN2012 “Adjusting PSoC Micro controller Trims for Dual Voltage-Range Operation” for information on trimming for operation at 3.3V.

7.See individual user module data sheets for information on maximum frequencies for user modules.

Document #: 001-43991 Rev. *D

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Contents Overview FeaturesLogic Block Diagram ENW PinoutsGpio NVA1 NVWNVA2 ENA1PSoC NV Core PSoC NV Functional OverviewNvSRAM Data Memory NvSRAM OperationAdditional System Resources Programmable Digital SystemProgrammable Analog System Esigner Development ToolsPSoC Designer Software Subsystems User Module and Source Code Development Flows Designing with User ModulesHardware Tools Parts per million Cypress nvSRAM user ModuleMicrohenry Picosecond Microsecond Samples per second3V Operation Operating TemperatureAbsolute Maximum Ratings ESDDC Electrical Characteristics Psrroa CmrroaPsrr OB Capacitor Unit Value Switch Cap DC Analog Reference SpecificationsAgnd = BandGap1 Agnd = 1.6 x BandGap1 Resistor Unit Value Continuous TimePORLEV10 = 00b Vdd Value for Ppor Trip negative ramp Vdd Value for Ppor Trip positive rampPORLEV10 = 00b Ppor Hysteresis PORLEV10 = 00bInput Low Voltage During Programming or Verify Supply Current During Programming or VerifyDriving internal pull During Programming or Verify Down resistorDC24M AC Electrical CharacteristicsGpio Operating Frequency 12.3 MHz Normal Strong Mode TRiseS Power Up Recall DurationStore Cycle Duration 12.5 Low Voltage Trigger LevelBwoa Spim CrcprsSpis BwobData Out Delay from Falling Edge of Sclk 0V ≤ Vcc ≤ Data Set up Time to Falling Edge of SclkSetup Time for a Repeated Start Condition Data Hold Time Data Setup Time5V Operation High Output Level Vcc Capacitive Load on Pins as Input Pin dependent. Temp = 25oCCombined IOH budget Input Low Level 75 toGross tested to 1 μA Input Capacitance Port 0 Analog Pins Input Leakage Current Port 0 Analog PinsLow power comparator LPC reference voltage range Vcc Average Input Offset Voltage DriftPsrrob PORLEV10 = 10b Ppor Hysteresis PORLEV10 = 10b Vdd Value for Ppor Trip negative rampVM20 = 011b VM20 = 100bBlock Output Low Voltage During Programming orVerify MHz Trimmed for 5V operation Using factory trim valuesSee on Internal Main Oscillator Frequency for 6 MHzGpio Operating Frequency MHz Normal Strong Mode TRiseFVcc = 4.75V to TFallFMaximum Frequency 49.2 MHz 75V ≤ Vcc ≤ MHz due to 2 Over clocking Maximum Input Clock Frequency 24.6 MHz 75V ≤ Vcc ≤ CRC ModeSions Transmitter Maximum Input Clock Frequency 24.6 MHz Vcc ≥ 4.75V, 2 Stop Bits MHz due to 8 Over clocking 49.2Data Out Delay from Falling Edge of Sclk 75V ≤ Vcc ≤ A b l e Switching WaveformsL e c t External Crystal Oscillator Startup Timing DiagramOrdering Information Part Numbering NomenclatureCY8CNP102B-AXI CY8CNP102E-AXIThermal Impedance Package DiagramsTqfp 81 oC/WGVCH/PYRS Document HistoryPyrs USB Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions