PRELIMINARY CY8CNP102B, CY8CNP102E
In the following table, tHRECALL starts from the time Vcc rises above VSWITCH. If an SRAM WRITE has not taken place since the last nonvolatile cycle, no STORE takes place. Industrial grade devices require 15 ms maximum.
Table 34. 5V nvSRAM AutoStore/Power Up RECALL (CY8CNP102E)
Parameter |
| Description |
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| nvSRAM |
| Unit | |||
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| Min |
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| Max |
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tHRECALL |
| Power Up RECALL Duration |
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| 20 |
| ms | |
tSTORE |
| STORE Cycle Duration |
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| 12.5 |
| ms | |
VSWITCH |
| Low Voltage Trigger Level |
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| 4.4 |
| V | |
tVccRISE |
| VCC Rise Time |
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| 150 |
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| μs | |
AC General Purpose IO Specifications |
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Table 35. 5V AC GPIO Specifications (CY8CNP102E) |
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Symbol |
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| Description | Min | Typ |
| Max | Units |
| Notes | |||
FGPIO |
| GPIO Operating Frequency | 0 | – |
| 12.3 | MHz | Normal Strong Mode | |||||
TRiseF |
| Rise Time, Normal Strong Mode, Cload = 50 pF | 3 | – |
| 18 | ns | Vcc = 4.75V to 5.25V | |||||
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| 10% - 90% |
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TFallF |
| Fall Time, Normal Strong Mode, Cload = 50 pF | 2 | – |
| 18 | ns | Vcc = 4.75V to 5.25V | |||||
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| 10% - 90% |
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| Figure 7. GPIO Timing Diagram |
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90%
GPIO
Pin
Output
Voltage
10%
TRiseF | TFallF |
TRiseS | TFallS |
Document #: | Page 29 of 38 |
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