Cypress CY8CNP102E, CY8CNP102B manual Programmable Digital System, Programmable Analog System

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PRELIMINARY CY8CNP102B, CY8CNP102E

Programmable Digital System

The digital system contains 16 digital PSoC blocks. Each block is an 8-bit resource that is used alone or combined with other blocks to form 8, 16, 24, and 32-bit peripherals, which are called user module references. The digital peripheral configurations are:

■PWMs (8 to 32 bit)

■PWMs with dead band (8 to 32 bit)

■Counters (8 to 32 bit)

■Timers (8 to 32 bit)

■UART 8 bit with selectable parity (up to 4)

■SPI master and slave (up to 4 each)

■I2C slave and multimaster (1 available as a System Resource)

■Cyclical Redundancy Checker and Generator (8 to 32 bit)

■IrDA (up to 4)

■Pseudo Random Sequence Generators (8 to 32 bit)

The digital blocks connect to any GPIO through a series of global buses that route any signal to any pin. The buses also enable signal multiplexing and performing logic operations. This configurability frees your designs from the constraints of a fixed peripheral controller.

Digital blocks are provided in rows of four, where the number of blocks varies with PSoC device family. This gives you the optimum choice of system resources for your application.

Programmable Analog System

The analog system consists 12 configurable blocks, each having an opamp circuit enabling the creation of complex analog signal flows. Analog peripherals are very flexible and may be customized to support specific application requirements. Some of the more common analog functions (most available as user modules) are:

■Analog-to-digital converters (up to 4, with 6 to 14 bit resolution, selectable as Incremental, Delta Sigma, and SAR)

■Filters (2, 4, 6, or 8 pole band pass, low pass, and notch)

■Amplifiers (up to 4, with selectable gain to 48x)

■Instrumentation amplifiers (up to 2, with selectable gain to 93x)

■Comparators (up to 4, with 16 selectable thresholds)

■DACs (up to 4, with 6 to 9 bit resolution)

■Multiplying DACs (up to 4, with 6 to 9 bit resolution)

■High current output drivers (four with 40 mA drive as a Core Resource)

■1.3V reference (as a System Resource)

■DTMF Dialer

■Modulators

■Correlators

■Peak Detectors

■Other possible topologies

■Analog blocks are provided in columns of three, which includes one CT (Continuous Time) and two SC (Switched Capacitor) blocks.

Additional System Resources

System Resources, some of which are listed in the previous sections, provide additional capability useful to complete systems. Resources include a multiplier, decimator, switch mode pump, low voltage detection, and power on reset. The merits of each system resource are:

■Digital clock dividers provide three customizable clock frequencies for use in applications. The clocks may be routed to both the digital and analog systems. Additional clocks are generated using digital PSoC blocks as clock dividers.

■Multiply Accumulate (MAC) provides fast 8-bit multiplier with 32-bit accumulate, to assist in general math and digital filters.

■The decimator provides a custom hardware filter for digital signal, and processing applications including the creation of Delta Sigma ADCs.

■The I2C module provides 100 and 400 kHz communication over two wires. Slave, master, and multi master modes are all supported.

■Low Voltage Detection (LVD) interrupts can signal the application of falling voltage levels, while the advanced POR (Power On Reset) circuit eliminates the need for a system supervisor.

Document #: 001-43991 Rev. *D

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Contents Features OverviewLogic Block Diagram Pinouts GpioENW NVA2 NVWNVA1 ENA1NvSRAM Data Memory PSoC NV Functional OverviewPSoC NV Core NvSRAM OperationProgrammable Digital System Programmable Analog SystemAdditional System Resources Development Tools PSoC Designer Software SubsystemsEsigner Designing with User Modules Hardware ToolsUser Module and Source Code Development Flows Microhenry Picosecond Microsecond Cypress nvSRAM user ModuleParts per million Samples per secondAbsolute Maximum Ratings Operating Temperature3V Operation ESDDC Electrical Characteristics Cmrroa PsrroaPsrr OB Agnd = BandGap1 Agnd = 1.6 x BandGap1 DC Analog Reference SpecificationsCapacitor Unit Value Switch Cap Resistor Unit Value Continuous TimePORLEV10 = 00b Ppor Hysteresis Vdd Value for Ppor Trip positive rampPORLEV10 = 00b Vdd Value for Ppor Trip negative ramp PORLEV10 = 00bDriving internal pull Supply Current During Programming or VerifyInput Low Voltage During Programming or Verify During Programming or Verify Down resistorAC Electrical Characteristics DC24MStore Cycle Duration 12.5 Power Up Recall DurationGpio Operating Frequency 12.3 MHz Normal Strong Mode TRiseS Low Voltage Trigger LevelBwoa Spis CrcprsSpim BwobSetup Time for a Repeated Start Condition Data Set up Time to Falling Edge of SclkData Out Delay from Falling Edge of Sclk 0V ≤ Vcc ≤ Data Hold Time Data Setup Time5V Operation Combined IOH budget Capacitive Load on Pins as Input Pin dependent. Temp = 25oCHigh Output Level Vcc Input Low Level 75 toLow power comparator LPC reference voltage range Vcc Input Leakage Current Port 0 Analog PinsGross tested to 1 μA Input Capacitance Port 0 Analog Pins Average Input Offset Voltage DriftPsrrob VM20 = 011b PORLEV10 = 10b Vdd Value for Ppor Trip negative rampPORLEV10 = 10b Ppor Hysteresis VM20 = 100bOutput Low Voltage During Programming or VerifyBlock See on Using factory trim valuesMHz Trimmed for 5V operation Internal Main Oscillator Frequency for 6 MHzVcc = 4.75V to MHz Normal Strong Mode TRiseFGpio Operating Frequency TFallFMaximum Frequency 49.2 MHz 75V ≤ Vcc ≤ Sions Transmitter Maximum Input Clock Frequency 24.6 MHz Maximum Input Clock Frequency 24.6 MHz 75V ≤ Vcc ≤ CRC ModeMHz due to 2 Over clocking Vcc ≥ 4.75V, 2 Stop Bits MHz due to 8 Over clocking 49.2Data Out Delay from Falling Edge of Sclk 75V ≤ Vcc ≤ Switching Waveforms A b l eExternal Crystal Oscillator Startup Timing Diagram L e c tCY8CNP102B-AXI Part Numbering NomenclatureOrdering Information CY8CNP102E-AXITqfp Package DiagramsThermal Impedance 81 oC/WDocument History PyrsGVCH/PYRS Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsUSB
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