Xilinx SP605 manual Spartan-6 XC6SLX45T-3FGG484 Fpga, Configuration

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Chapter 1: SP605 Evaluation Board

Table 1-1:

SP605 Features (Cont’d)

 

 

 

 

 

 

Number

Feature

Notes

Schematic

Page

 

 

 

 

 

 

 

 

Switches

Power, Configuration,

14, 18, 20,

 

Pushbutton Switches

25

 

 

 

 

 

 

 

a. SP605 Power On-Off Slide

 

25

 

Switch

 

 

 

 

 

 

 

 

17

b. FPGA Mode DIP Switch

 

18

 

 

 

 

c. System ACE CF

 

20

 

Configuration DIP Switch

 

 

 

 

 

 

 

 

 

d. FPGA PROG, CPU Reset,

 

 

 

and System ACE CF Reset

 

14, 20

 

Pushbutton Switches

 

 

 

 

 

 

18

FMC LPC Connector

Samtec ASP-134603-01

10

 

 

 

 

 

a. Power Management

2x TI UCD9240PFC

21, 26

 

Controller

19

 

 

 

 

 

b. Mini-Fit Type 6-Pin, ATX

12V input power connectors

25

 

 

Type 4-pin

 

 

 

 

 

 

 

1. Spartan-6 XC6SLX45T-3FGG484 FPGA

AXilinx Spartan-6 XC6SLX45T-3FGG484 FPGA is installed on the Embedded Development Board.

References

See the Spartan-6 FPGA Data Sheet. [Ref 1]

Configuration

The SP605 supports configuration in the following modes:

JTAG (using the included USB-A to Mini-B cable)

JTAG (using System ACE CF and CompactFlash card)

Master SPI x4

Master SPI x4 with off-board device

Linear BPI Flash

For details on configuring the FPGA, see “Configuration Options.”

Mode switch SW1 (see Table 1-30, page 55) is set to 10 = Slave SelectMAP to choose the System ACE CF default configuration.

References

See the Spartan-6 FPGA Configuration User Guide for more information. [Ref 2]

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SP605 Hardware User Guide

 

 

UG526 (v1.1.1) February 1, 2010

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Contents SP605 Hardware User Guide UG526 v1.1.1 February 1, 2010 optionalRevision History Date Version RevisionTable of Contents SP605 Hardware User Guide About This Guide Additional Support Resources Preface About This GuideSP605 Evaluation Board Additional InformationFeatures SP605 Evaluation BoardBlock Diagram OverviewSP605 Features FeatureDetailed Description SP605 Features Cont’d Configuration SP605 Evaluation Board SP605 Features Cont’dSpartan-6 XC6SLX45T-3FGG484 Fpga MB DDR3 Component Memory Voltage RailsDetailed Description 2I/O Voltage Rail of Fpga BanksSchematic Net Name Memory U42 Pin Pin Number Pin Name 5DDR3 Component Memory ConnectionsU1 Fpga SPI x4 Flash 3J17 SPI Flash Programming HeaderSchematic Net Name Detailed Description 6SPI x4 Memory ConnectionsLinear BPI Flash Pin Number Pin NameFLASHA16 System ACE CF and CompactFlash Connector Fpga Design Considerations for the Configuration Flash8System ACE CF Connections U1 Fpga Pin Schematic Net Name1 U17 XCCACETQ144IUSB Jtag Clock Generation Oscillator DifferentialOscillator Socket Single-Ended, 2.5V or 8SP605 X2 Oscillator Socket Pin 1 Location IdentifiersSMA Connectors Differential Multi-Gigabit Transceivers GTP MGTsMGT Refclk Smarefclkn 11PCIe Edge Connector Connections U1 Fpga Pin P4 PCIe Edge ConnectorPCI Express Endpoint Connectivity References SFP Module Connector Sfpclkqop14PHY Configuration Pins 11 /100/1000 Tri-Speed Ethernet PHYBit2 Bit1 Bit0 15Ethernet PHY Connections U1 Fpga PinPHYRXD7 USB-to-UART Bridge 17 USB-to-UART ConnectionsDVI Codec IIC Bus 11IIC Bus TopologyKb NV Memory IicsclsfpIicsdamain SDA Signal Name Color Label Description Status LEDsEthernet PHY Status LEDs 13Ethernet PHY Status LEDsFpga Init and Done LEDs 22 Fpga Init and Done LED ConnectionsUser I/O User LEDs23User LED Connections U1 Fpga Pin Controlled LEDUser Pushbutton Switches SW6User DIP Switch User SIP Header U1 Fpga PinUser SMA Gpio Usersmagpion UsersmagpiopSwitches Power On/Off Slide Switch SW2Sysaceresetb Pushbutton SW9 Active-Low Fpgaprogb Pushbutton SW3 Active-Low23System ACE CF CompactFlash Image Select DIP Switch S1 Mode DIP Switch SW1 Active-High 24FPGA Mode DIP Switch SW1Vita 57.1 FMC LPC Connector 28VITA 57.1 FMC LPC Connections LPC PinPower Management AC Adapter and 12V Input Power Jack/SwitchOnboard Power Regulation Power ManagementUCD9240PFC Configuration Options 30SP605 Fpga Configuration Modes M10 Bus WidthConfiguration Solution User Guide Section SP605 Evaluation Board Table A-1Default Switch Settings Function/Type DefaultFMC Jtag Vita 57.1 FMC LPC Connector Pinout Appendix B Vita 57.1 FMC LPC Connector Pinout SP605 Master UCF Appendix C SP605 Master UCF NET FmcpwrgoodflashrstbNET Fpgacmpcsb NET MEM1LDQSN LOC NET Sysclkn Appendix C SP605 Master UCF References