Xilinx SP605 manual UCD9240PFC

Page 54

Chapter 1: SP605 Evaluation Board

Table 1-29:Onboard Power System Devices

Device Type

Reference

Description

Power Rail Net

Power Rail

Schematic

Designator

Name

Voltage

Page

 

 

 

 

 

 

 

 

UCD9240PFC

U26

PMBus Controller - Core (Addr = 52)

 

 

21

 

 

 

 

 

 

PTD08A010W

U18

10A 0.6V - 3.6V Adj. Switching Regulator

VCCINT_FPGA

1.20V

22

 

 

 

 

 

 

PTD08A010W

U19

10A 0.6V - 3.6V Adj. Switching Regulator

VCC2V5_FPGA

2.50V

23

 

 

 

 

 

 

PTD08A010W

U20

10A 0.6V - 3.6V Adj. Switching Regulator

VCCAUX

2.50V

24

 

 

 

 

 

 

 

 

 

 

 

 

UCD9240PFC

U27

PMBus Controller - Core (Addr = 53)

 

 

26

 

 

 

 

 

 

PTD08A010W

U21

10A 0.6V - 3.6V Adj. Switching Regulator

VCC1V5_FPGA

1.50V

29

 

 

 

 

 

 

PTD08A010W

 

10A 0.6V - 3.6V Adj. Switching Regulator

VCC3V3

3.30V

30

 

 

 

 

 

 

 

 

 

 

 

 

TL1963AKTTR

U5

1.5A 12V IN, 5.0V OUT Linear Regulator

VCC5

5.00V

21

 

 

 

 

 

 

TPS74401

U51

3A 1.5V IN, 1.2V OUT Linear Regulator

MGT_AVCC

1.20V

27

 

 

 

 

 

 

TPS512300DRCT

U11

3A DDR3 VTERM Tracking Linear

VTTDDR

0.75V

31

Regulator

 

 

 

 

 

 

 

 

 

 

 

TPS512300DRCT

U11

10mA Tracking Reference output

VTTVREF

0.75V

31

 

 

 

 

 

 

TL1963-18DCQR

U44

1.5A 2.5V IN, 1.8V OUT Linear Regulator

VCC1V8

1.80V

31

 

 

 

 

 

 

LT1763CS8

U49

500mA 5V IN, 3.0V OUT Linear

VCC3V0

3.00V

31

Regulator

 

 

 

 

 

 

 

 

 

 

 

TPS73633DBVT

U10

400mA 5V IN, 3.30V OUT Linear

DVI_VCCA

3.30V

17

Regulator

 

 

 

 

 

 

 

 

 

 

 

Voltage and current monitoring and control are available for selected power rails through Texas Instruments' Fusion Digital Power™ graphical user interface (GUI). Both onboard TI power controllers are wired to the same PMBus. The PMBus connector, J1, is provided for use with the TI USB Interface Adapter PMBus pod and associated TI GUI.

References

Refer to the Texas Instruments website for more detailed information about power management controllers and regulator modules.

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SP605 Hardware User Guide

 

 

UG526 (v1.1.1) February 1, 2010

Image 54
Contents SP605 Hardware User Guide UG526 v1.1.1 February 1, 2010 optionalRevision History Date Version RevisionTable of Contents SP605 Hardware User Guide About This Guide Additional Support Resources Preface About This GuideSP605 Evaluation Board Additional InformationFeatures SP605 Evaluation BoardBlock Diagram OverviewSP605 Features FeatureDetailed Description SP605 Features Cont’d Configuration SP605 Evaluation Board SP605 Features Cont’dSpartan-6 XC6SLX45T-3FGG484 Fpga Detailed Description MB DDR3 Component MemoryVoltage Rails 2I/O Voltage Rail of Fpga BanksSchematic Net Name Memory U42 Pin Pin Number Pin Name 5DDR3 Component Memory ConnectionsU1 Fpga SPI x4 Flash 3J17 SPI Flash Programming HeaderSchematic Net Name Detailed Description 6SPI x4 Memory ConnectionsLinear BPI Flash Pin Number Pin NameFLASHA16 System ACE CF and CompactFlash Connector Fpga Design Considerations for the Configuration Flash8System ACE CF Connections U1 Fpga Pin Schematic Net Name1 U17 XCCACETQ144IUSB Jtag Clock Generation Oscillator DifferentialOscillator Socket Single-Ended, 2.5V or 8SP605 X2 Oscillator Socket Pin 1 Location IdentifiersSMA Connectors Differential Multi-Gigabit Transceivers GTP MGTsMGT Refclk Smarefclkn 11PCIe Edge Connector Connections U1 Fpga Pin P4 PCIe Edge ConnectorPCI Express Endpoint Connectivity References SFP Module Connector SfpclkqopBit2 Bit1 Bit0 14PHY Configuration Pins11 /100/1000 Tri-Speed Ethernet PHY 15Ethernet PHY Connections U1 Fpga PinPHYRXD7 USB-to-UART Bridge 17 USB-to-UART ConnectionsDVI Codec IIC Bus 11IIC Bus TopologyKb NV Memory IicsclsfpIicsdamain SDA Signal Name Color Label Description Status LEDsEthernet PHY Status LEDs 13Ethernet PHY Status LEDsFpga Init and Done LEDs 22 Fpga Init and Done LED Connections23User LED Connections U1 Fpga Pin User I/OUser LEDs Controlled LEDUser Pushbutton Switches SW6User DIP Switch User SIP Header U1 Fpga PinUser SMA Gpio Usersmagpion UsersmagpiopSwitches Power On/Off Slide Switch SW2Sysaceresetb Pushbutton SW9 Active-Low Fpgaprogb Pushbutton SW3 Active-Low23System ACE CF CompactFlash Image Select DIP Switch S1 Mode DIP Switch SW1 Active-High 24FPGA Mode DIP Switch SW1Vita 57.1 FMC LPC Connector 28VITA 57.1 FMC LPC Connections LPC PinPower Management AC Adapter and 12V Input Power Jack/SwitchOnboard Power Regulation Power ManagementUCD9240PFC Configuration Options 30SP605 Fpga Configuration Modes M10 Bus WidthConfiguration Solution User Guide Section SP605 Evaluation Board Table A-1Default Switch Settings Function/Type DefaultFMC Jtag Vita 57.1 FMC LPC Connector Pinout Appendix B Vita 57.1 FMC LPC Connector Pinout SP605 Master UCF Appendix C SP605 Master UCF NET FmcpwrgoodflashrstbNET Fpgacmpcsb NET MEM1LDQSN LOC NET Sysclkn Appendix C SP605 Master UCF References