Xilinx SP605 manual Switches, Power On/Off Slide Switch SW2

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Chapter 1: SP605 Evaluation Board

17. Switches

The SP605 Evaluation board includes the following switches:

Power On/Off Slide Switch SW2

FPGA_PROG_B Pushbutton SW3 (Active-Low)

SYSACE_RESET_B Pushbutton SW9 (Active-Low)

System ACE CF CompactFlash Image Select DIP Switch S1 (Active-High)

Mode DIP Switch SW1 (Active-High)

Power On/Off Slide Switch SW2

SW2 is the SP605 board main power on/off switch. Sliding the switch actuator from the off to on position applies 12V power from either J18 (6-pin Mini-Fit) or J27 (4-pin ATX) power connector to the VCC12_P power plane. Green LED DS14 will illuminate when the SPL605 board power is on. See “Power Management,” page 52 for details on the on-board power system.

VCC12_P

J18

DPDT

 

 

1

 

 

 

VCC12_P_IN

 

 

1

NC

 

 

12v

 

 

 

 

 

 

2

3

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

 

12v

 

 

 

 

 

 

4

NC

 

 

2

NC

 

 

 

 

 

N/C

 

1

+ C280

5

 

6

 

 

 

 

 

 

 

 

 

 

 

 

N/C

5

NC

 

2

330UF

 

 

 

 

 

 

 

COM

3

 

 

 

16V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

 

 

 

ELEC

SW2

 

 

 

COM

 

 

 

 

 

1201M2S3ABE2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

39-30-1060

1

R322

1.00K

1%

21/16W

 

2

 

LED-GRN

 

DS25

 

-SMT

1

 

PCIe

Power

ATX Peripheral Cable Connector can plug into J27 when SP605 is in PC and the desk top AC adapter (brick) is not used.

J27

 

 

 

 

 

 

12V

 

 

1

 

 

 

 

 

 

2

 

 

 

 

 

COM

 

 

 

 

 

3

 

 

 

 

 

COM

 

 

 

 

 

 

 

4 NC

 

 

 

 

 

5V

 

 

 

 

 

 

 

 

 

 

 

 

350211-1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CAUTION!

DO NOT plug a PC ATX power supply 6-pin connector into the J18 connector on the SP605 board. The ATX 6-pin connector has a different pinout than J18 and will damage the SP605 board and void the board warranty.

DO NOT plug an auxilliary PCIe 6-pin molex power connector into the J18 connector as this could damage the PCIe motherboard and/or the SP605 board. J18 is marked with a NO PCIE POWER label to warn users of the poten- tial hazard.

DO NOT apply power to J18 and the 4-pin ATX disk drive connector J27 at the same time as this will damage the SP605 board.

UG526_20 _100609

Figure 1-20:Power On/Off Slide Switch SW2

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SP605 Hardware User Guide

 

 

UG526 (v1.1.1) February 1, 2010

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Contents SP605 Hardware User Guide UG526 v1.1.1 February 1, 2010 optionalRevision History Date Version RevisionTable of Contents SP605 Hardware User Guide About This Guide Additional Support Resources Preface About This GuideSP605 Evaluation Board Additional InformationFeatures SP605 Evaluation BoardBlock Diagram OverviewSP605 Features FeatureDetailed Description SP605 Features Cont’d SP605 Evaluation Board SP605 Features Cont’d ConfigurationSpartan-6 XC6SLX45T-3FGG484 Fpga Detailed Description MB DDR3 Component MemoryVoltage Rails 2I/O Voltage Rail of Fpga BanksSchematic Net Name Memory U42 Pin Pin Number Pin Name 5DDR3 Component Memory ConnectionsU1 Fpga SPI x4 Flash 3J17 SPI Flash Programming HeaderSchematic Net Name Detailed Description 6SPI x4 Memory ConnectionsLinear BPI Flash Pin Number Pin NameFLASHA16 System ACE CF and CompactFlash Connector Fpga Design Considerations for the Configuration Flash8System ACE CF Connections U1 Fpga Pin Schematic Net Name1 U17 XCCACETQ144IUSB Jtag Clock Generation Oscillator DifferentialOscillator Socket Single-Ended, 2.5V or 8SP605 X2 Oscillator Socket Pin 1 Location IdentifiersSMA Connectors Differential Multi-Gigabit Transceivers GTP MGTsMGT Refclk Smarefclkn P4 PCIe Edge Connector 11PCIe Edge Connector Connections U1 Fpga PinPCI Express Endpoint Connectivity References SFP Module Connector SfpclkqopBit2 Bit1 Bit0 14PHY Configuration Pins11 /100/1000 Tri-Speed Ethernet PHY 15Ethernet PHY Connections U1 Fpga PinPHYRXD7 USB-to-UART Bridge 17 USB-to-UART ConnectionsDVI Codec IIC Bus 11IIC Bus TopologyKb NV Memory IicsclsfpIicsdamain SDA Signal Name Color Label Description Status LEDsEthernet PHY Status LEDs 13Ethernet PHY Status LEDsFpga Init and Done LEDs 22 Fpga Init and Done LED Connections23User LED Connections U1 Fpga Pin User I/OUser LEDs Controlled LEDUser Pushbutton Switches SW6User DIP Switch User SIP Header U1 Fpga PinUser SMA Gpio Usersmagpion UsersmagpiopSwitches Power On/Off Slide Switch SW2Sysaceresetb Pushbutton SW9 Active-Low Fpgaprogb Pushbutton SW3 Active-Low23System ACE CF CompactFlash Image Select DIP Switch S1 Mode DIP Switch SW1 Active-High 24FPGA Mode DIP Switch SW1Vita 57.1 FMC LPC Connector 28VITA 57.1 FMC LPC Connections LPC PinPower Management AC Adapter and 12V Input Power Jack/SwitchOnboard Power Regulation Power ManagementUCD9240PFC 30SP605 Fpga Configuration Modes M10 Bus Width Configuration OptionsConfiguration Solution User Guide Section SP605 Evaluation Board Table A-1Default Switch Settings Function/Type DefaultFMC Jtag Vita 57.1 FMC LPC Connector Pinout Appendix B Vita 57.1 FMC LPC Connector Pinout SP605 Master UCF Appendix C SP605 Master UCF NET FmcpwrgoodflashrstbNET Fpgacmpcsb NET MEM1LDQSN LOC NET Sysclkn Appendix C SP605 Master UCF References