Xilinx SP605 manual Block Diagram, Overview

Page 9

Overview

•17. Switches

♦Power On/Off slide switch

♦System ACE CF Reset pushbutton

♦System ACE CF bitstream image select DIP switch

♦Mode DIP switch

•18. VITA 57.1 FMC LPC Connector

•Configuration Options

♦3. SPI x4 Flash (both onboard and off-board)

♦4. Linear BPI Flash

♦5. System ACE CF and CompactFlash Connector

♦6. USB JTAG

•Power Management

♦AC Adapter and 12V Input Power Jack/Switch

♦Onboard Power Regulation

Block Diagram

Figure 1-1shows a high-level block diagram of the SP605 and its peripherals.

LED

DIP Switch

User SMA x2

1-Lane I/Fs:		PCIe 125 MHz Clk
PCIe Edge Conn.		SMA REFCLK
SMA x4 SFP		SFPCLK
FMC-LPC		FMC GBTCLK

Part of

FMC-LPC

Expansion

Connector

SFP IIC Bus

JTAG	JTAG
System ACE					Main IIC Bus
MPU I/F		DED	MGTs
		DED	MGTs
		L/S	Bank 0		USB UART and
JTAG			2.5V		USB UART and
JTAG			2.5V		USB Mini-B
USB JTAG Logic					USB Mini-B
USB JTAG Logic					Connector
and USB Mini-B					Connector
and USB Mini-B			Spartan-6
Connector		Bank 3	Spartan-6	Bank 1	DVI Codec and
		Bank 3	XC6SLX45T-3FGG484	Bank 1
		1.5V	XC6SLX45T-3FGG484	2.5V
DDR3		1.5V	U1	2.5V	DVI Connector
			U1		DVI Connector

Component
Memory					10/100/1000
			Bank 2		Ethernet PHY,
Pushbuttons		L/S	2.5V		Status LEDs,
DIP Switch					and Connector
DIP Switch
GPIO Header				DVI IIC Bus	Parallel Flash
				DVI IIC Bus

				LED,		SPI x4,		Part of FMC-LPC
				DIP Switch		SPI Header		Expansion Conn.

	L/S	= Level Shifter								UG526_01_110409

Figure 1-1:SP605 Features and Banking

SP605 Hardware User Guide

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UG526 (v1.1.1) February 1, 2010

Image 9

Contents UG526 v1.1.1 February 1, 2010 optional SP605 Hardware User GuideDate Version Revision Revision HistoryTable of Contents SP605 Hardware User Guide About This Guide Preface About This Guide Additional Support ResourcesAdditional Information SP605 Evaluation BoardSP605 Evaluation Board FeaturesOverview Block DiagramFeature SP605 FeaturesDetailed Description SP605 Features Cont’d Configuration SP605 Evaluation Board SP605 Features Cont’dSpartan-6 XC6SLX45T-3FGG484 Fpga Voltage Rails MB DDR3 Component MemoryDetailed Description 2I/O Voltage Rail of Fpga Banks5DDR3 Component Memory Connections Schematic Net Name Memory U42 Pin Pin Number Pin NameU1 Fpga 3J17 SPI Flash Programming Header SPI x4 FlashDetailed Description 6SPI x4 Memory Connections Schematic Net NamePin Number Pin Name Linear BPI FlashFLASHA16 Fpga Design Considerations for the Configuration Flash System ACE CF and CompactFlash ConnectorU17 XCCACETQ144I 8System ACE CF Connections U1 Fpga Pin Schematic Net Name1USB Jtag Oscillator Differential Clock Generation8SP605 X2 Oscillator Socket Pin 1 Location Identifiers Oscillator Socket Single-Ended, 2.5V orMulti-Gigabit Transceivers GTP MGTs SMA Connectors DifferentialMGT Refclk Smarefclkn 11PCIe Edge Connector Connections U1 Fpga Pin P4 PCIe Edge ConnectorPCI Express Endpoint Connectivity References Sfpclkqop SFP Module Connector11 /100/1000 Tri-Speed Ethernet PHY 14PHY Configuration PinsBit2 Bit1 Bit0 15Ethernet PHY Connections U1 Fpga PinPHYRXD7 17 USB-to-UART Connections USB-to-UART BridgeDVI Codec 11IIC Bus Topology IIC BusIicsclsfp Kb NV MemoryIicsdamain SDA Status LEDs Signal Name Color Label Description13Ethernet PHY Status LEDs Ethernet PHY Status LEDs22 Fpga Init and Done LED Connections Fpga Init and Done LEDsUser LEDs User I/O23User LED Connections U1 Fpga Pin Controlled LEDSW6 User Pushbutton SwitchesUser DIP Switch U1 Fpga Pin User SIP HeaderUsersmagpion Usersmagpiop User SMA GpioPower On/Off Slide Switch SW2 SwitchesFpgaprogb Pushbutton SW3 Active-Low Sysaceresetb Pushbutton SW9 Active-Low23System ACE CF CompactFlash Image Select DIP Switch S1 24FPGA Mode DIP Switch SW1 Mode DIP Switch SW1 Active-HighVita 57.1 FMC LPC Connector LPC Pin 28VITA 57.1 FMC LPC ConnectionsAC Adapter and 12V Input Power Jack/Switch Power ManagementPower Management Onboard Power RegulationUCD9240PFC Configuration Options 30SP605 Fpga Configuration Modes M10 Bus WidthConfiguration Solution User Guide Section SP605 Evaluation Board Function/Type Default Table A-1Default Switch SettingsFMC Jtag Vita 57.1 FMC LPC Connector Pinout Appendix B Vita 57.1 FMC LPC Connector Pinout SP605 Master UCF NET Fmcpwrgoodflashrstb Appendix C SP605 Master UCFNET Fpgacmpcsb NET MEM1LDQSN LOC NET Sysclkn Appendix C SP605 Master UCF References