Xilinx SP605 manual 8System ACE CF Connections U1 Fpga Pin Schematic Net Name1, U17 XCCACETQ144I

Xilinx SP605 manual Block Diagram, Overview Xilinx manual SP605 Features Xilinx manual Detailed Description SP605 Features Cont’d Xilinx manual Spartan-6 XC6SLX45T-3FGG484 Fpga, Configuration, SP605 Evaluation Board SP605 Features Cont’d Xilinx SP605 manual MB DDR3 Component Memory, Voltage Rails, Detailed Description, 2I/O Voltage Rail of Fpga Banks Xilinx SP605 manual 5DDR3 Component Memory Connections, Schematic Net Name Memory U42 Pin Pin Number Pin Name Xilinx SP605 manual U1 Fpga Xilinx SP605 manual SPI x4 Flash, 3J17 SPI Flash Programming Header Xilinx SP605 manual Detailed Description 6SPI x4 Memory Connections, Schematic Net Name Xilinx SP605 manual Linear BPI Flash, Pin Number Pin Name Xilinx SP605 manual FLASHA16 Xilinx SP605 manual System ACE CF and CompactFlash Connector, Fpga Design Considerations for the Configuration Flash Xilinx SP605 manual 8System ACE CF Connections U1 Fpga Pin Schematic Net Name1, U17 XCCACETQ144I Xilinx SP605 manual USB Jtag Xilinx SP605 manual Clock Generation, Oscillator Differential Xilinx manual Oscillator Socket Single-Ended, 2.5V or, 8SP605 X2 Oscillator Socket Pin 1 Location Identifiers Xilinx SP605 manual Multi-Gigabit Transceivers GTP MGTs, SMA Connectors Differential Xilinx SP605 manual MGT Refclk Xilinx SP605 manual Smarefclkn Xilinx SP605 PCI Express Endpoint Connectivity, 11PCIe Edge Connector Connections U1 Fpga Pin, P4 PCIe Edge Connector Xilinx SP605 manual References Xilinx SP605 manual SFP Module Connector, Sfpclkqop Xilinx SP605 manual 11 /100/1000 Tri-Speed Ethernet PHY, 14PHY Configuration Pins, Bit2 Bit1 Bit0, U46 M88E111 Xilinx SP605 manual PHYRXD7 Xilinx SP605 manual USB-to-UART Bridge, USB-to-UART Connections Xilinx SP605 manual DVI Codec Xilinx SP605 manual 11IIC Bus Topology Xilinx SP605 manual Kb NV Memory, Iicsclsfp Xilinx SP605 manual Iicsdamain SDA Xilinx SP605 manual Status LEDs, Signal Name Color Label Description Xilinx SP605 manual 13Ethernet PHY Status LEDs Xilinx SP605 manual Fpga Init and Done LEDs, Fpga Init and Done LED Connections Xilinx SP605 manual User I/O, User LEDs, 23User LED Connections U1 Fpga Pin, Controlled LED Xilinx SP605 manual User Pushbutton Switches, SW6 Xilinx SP605 manual User DIP Switch Xilinx SP605 manual User SIP Header, U1 Fpga Pin
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Detailed Description

System ACE CF error and status LEDs indicate the operational state of the System ACE CF controller:

•A blinking red error LED indicates that no CompactFlash card is present

•A solid red error LED indicates an error condition during configuration

•A blinking green status LED indicates a configuration operation is ongoing

•A solid green status LED indicates a successful download

The mode SW1 setting is important because the System ACE CF can fail to configure the FPGA when the mode pins are set to the master modes (Table 1-30, page 55). A configuration failure from the master mode can drive INIT_B low, which blocks the System ACE CF from downloading a configuration ACE file. The FPGA mode pins must be set as specified in Table 1-30for the System ACE CF configuration solution.

With the mode switch SW1 set to 10 (Slave SelectMAP, Table 1-30), if a Compact Flash (CF) card is installed in the CF socket U37, the System ACE CF will attempt to load a bitstream from the CF card image address pointed to by the image select switch S1.

Every time a CompactFlash card is inserted into the System ACE CF socket, a configuration operation is initiated. Pressing the System ACE CF reset button reprograms the FPGA.

Note: System ACE CF configuration is enabled by way of DIP switch S1. See “17. Switches,” page 46 for more details.

The System ACE CF MPU port (Table 1-8) is connected to the FPGA. This connection allows the FPGA to use the System ACE CF controller to reconfigure the system or access the CompactFlash card as a generic FAT file system.

Table 1-8:System ACE CF Connections

 

U1 FPGA Pin

Schematic Net Name(1)

U17 XCCACETQ144I

 

 

 

 

Pin Number

Pin Name

 

 

 

 

 

 

 

 

 

N6

SYSACE_D0

66

MPD00

 

 

 

 

 

 

N7

SYSACE_D1

65

MPD01

 

 

 

 

 

 

U4

SYSACE_D2

63

MPD02

 

 

 

 

 

 

T4

SYSACE_D3

62

MPD03

 

 

 

 

 

 

P6

SYSACE_D4

61

MPD04

 

 

 

 

 

 

P7

SYSACE_D5

60

MPD05

 

 

 

 

 

 

T3

SYSACE_D6

59

MPD06

 

 

 

 

 

 

R4

SYSACE_D7

58

MPD07

 

 

 

 

 

 

V5

SYSACE_MPA00

70

MPA00

 

 

 

 

 

 

V3

SYSACE_MPA01

69

MPA01

 

 

 

 

 

 

P5

SYSACE_MPA02

68

MPA02

 

 

 

 

 

 

P4

SYSACE_MPA03

67

MPA03

 

 

 

 

 

 

H4

SYSACE_MPA04

45

MPA04

 

 

 

 

 

 

G4

SYSACE_MPA05

44

MPA05

 

 

 

 

 

 

D2

SYSACE_MPA06

43

MPA06

 

 

 

 

 

 

 

 

 

 

SP605 Hardware User Guide

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UG526 (v1.1.1) February 1, 2010

 

 

 

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Contents UG526 v1.1.1 February 1, 2010 optional SP605 Hardware User GuideDate Version Revision Revision HistoryTable of Contents SP605 Hardware User Guide About This Guide Preface About This Guide Additional Support ResourcesAdditional Information SP605 Evaluation BoardSP605 Evaluation Board FeaturesOverview Block DiagramFeature SP605 FeaturesDetailed Description SP605 Features Cont’d Configuration SP605 Evaluation Board SP605 Features Cont’dSpartan-6 XC6SLX45T-3FGG484 Fpga Voltage Rails MB DDR3 Component MemoryDetailed Description 2I/O Voltage Rail of Fpga Banks5DDR3 Component Memory Connections Schematic Net Name Memory U42 Pin Pin Number Pin NameU1 Fpga 3J17 SPI Flash Programming Header SPI x4 FlashDetailed Description 6SPI x4 Memory Connections Schematic Net NamePin Number Pin Name Linear BPI FlashFLASHA16 Fpga Design Considerations for the Configuration Flash System ACE CF and CompactFlash ConnectorU17 XCCACETQ144I 8System ACE CF Connections U1 Fpga Pin Schematic Net Name1USB Jtag Oscillator Differential Clock Generation8SP605 X2 Oscillator Socket Pin 1 Location Identifiers Oscillator Socket Single-Ended, 2.5V orMulti-Gigabit Transceivers GTP MGTs SMA Connectors DifferentialMGT Refclk Smarefclkn 11PCIe Edge Connector Connections U1 Fpga Pin P4 PCIe Edge ConnectorPCI Express Endpoint Connectivity References Sfpclkqop SFP Module Connector11 /100/1000 Tri-Speed Ethernet PHY 14PHY Configuration PinsBit2 Bit1 Bit0 15Ethernet PHY Connections U1 Fpga PinPHYRXD7 17 USB-to-UART Connections USB-to-UART BridgeDVI Codec 11IIC Bus Topology IIC BusIicsclsfp Kb NV MemoryIicsdamain SDA Status LEDs Signal Name Color Label Description13Ethernet PHY Status LEDs Ethernet PHY Status LEDs22 Fpga Init and Done LED Connections Fpga Init and Done LEDsUser LEDs User I/O23User LED Connections U1 Fpga Pin Controlled LEDSW6 User Pushbutton SwitchesUser DIP Switch U1 Fpga Pin User SIP HeaderUsersmagpion Usersmagpiop User SMA GpioPower On/Off Slide Switch SW2 SwitchesFpgaprogb Pushbutton SW3 Active-Low Sysaceresetb Pushbutton SW9 Active-Low23System ACE CF CompactFlash Image Select DIP Switch S1 24FPGA Mode DIP Switch SW1 Mode DIP Switch SW1 Active-HighVita 57.1 FMC LPC Connector LPC Pin 28VITA 57.1 FMC LPC ConnectionsAC Adapter and 12V Input Power Jack/Switch Power ManagementPower Management Onboard Power RegulationUCD9240PFC Configuration Options 30SP605 Fpga Configuration Modes M10 Bus WidthConfiguration Solution User Guide Section SP605 Evaluation Board Function/Type Default Table A-1Default Switch SettingsFMC Jtag Vita 57.1 FMC LPC Connector Pinout Appendix B Vita 57.1 FMC LPC Connector Pinout SP605 Master UCF NET Fmcpwrgoodflashrstb Appendix C SP605 Master UCFNET Fpgacmpcsb NET MEM1LDQSN LOC NET Sysclkn Appendix C SP605 Master UCF References
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