Xilinx SP605 manual User Pushbutton Switches, SW6

Page 42

Chapter 1: SP605 Evaluation Board

User Pushbutton Switches

The SP605 provides five active-High pushbutton switches: SW4, SW5, SW6, SW7 and SW8. The five pushbuttons all have the same topology as the sample shown in Figure 1-16. Four pushbuttons are assigned as GPIO, and the fifth is assigned as a CPU_RESET. Figure 1-16and Table 1-24describe the pushbutton switches.

VCC1V5

CPU_RESET

1

2

Pushbutton

P1 P4

P2 P3

4

3

SW6

1R230

1.00K

1%

21/16W

UG526_16_092409

Figure 1-16:User Pushbutton Switch (Typical)

Table 1-24:Pushbutton Switch Connections

U1 FPGA Pin	Schematic Netname	Switch Pin

F3	GPIO_BUTTON_0	SW4.2

G6	GPIO_BUTTON_1	SW7.2

F5	GPIO_BUTTON_2	SW5.2

C1	GPIO_BUTTON_3	SW8.2

H8	CPU_RESET	SW6.2

42	www.xilinx.com	SP605 Hardware User Guide
		UG526 (v1.1.1) February 1, 2010

Image 42

Contents SP605 Hardware User Guide UG526 v1.1.1 February 1, 2010 optionalRevision History Date Version RevisionTable of Contents SP605 Hardware User Guide About This Guide Additional Support Resources Preface About This GuideSP605 Evaluation Board Additional InformationFeatures SP605 Evaluation BoardBlock Diagram OverviewSP605 Features FeatureDetailed Description SP605 Features Cont’d Configuration SP605 Evaluation Board SP605 Features Cont’dSpartan-6 XC6SLX45T-3FGG484 Fpga Detailed Description MB DDR3 Component MemoryVoltage Rails 2I/O Voltage Rail of Fpga BanksSchematic Net Name Memory U42 Pin Pin Number Pin Name 5DDR3 Component Memory ConnectionsU1 Fpga SPI x4 Flash 3J17 SPI Flash Programming HeaderSchematic Net Name Detailed Description 6SPI x4 Memory ConnectionsLinear BPI Flash Pin Number Pin NameFLASHA16 System ACE CF and CompactFlash Connector Fpga Design Considerations for the Configuration Flash8System ACE CF Connections U1 Fpga Pin Schematic Net Name1 U17 XCCACETQ144IUSB Jtag Clock Generation Oscillator DifferentialOscillator Socket Single-Ended, 2.5V or 8SP605 X2 Oscillator Socket Pin 1 Location IdentifiersSMA Connectors Differential Multi-Gigabit Transceivers GTP MGTsMGT Refclk Smarefclkn 11PCIe Edge Connector Connections U1 Fpga Pin P4 PCIe Edge ConnectorPCI Express Endpoint Connectivity References SFP Module Connector SfpclkqopBit2 Bit1 Bit0 14PHY Configuration Pins11 /100/1000 Tri-Speed Ethernet PHY 15Ethernet PHY Connections U1 Fpga PinPHYRXD7 USB-to-UART Bridge 17 USB-to-UART ConnectionsDVI Codec IIC Bus 11IIC Bus TopologyKb NV Memory IicsclsfpIicsdamain SDA Signal Name Color Label Description Status LEDsEthernet PHY Status LEDs 13Ethernet PHY Status LEDsFpga Init and Done LEDs 22 Fpga Init and Done LED Connections23User LED Connections U1 Fpga Pin User I/OUser LEDs Controlled LEDUser Pushbutton Switches SW6User DIP Switch User SIP Header U1 Fpga PinUser SMA Gpio Usersmagpion UsersmagpiopSwitches Power On/Off Slide Switch SW2Sysaceresetb Pushbutton SW9 Active-Low Fpgaprogb Pushbutton SW3 Active-Low23System ACE CF CompactFlash Image Select DIP Switch S1 Mode DIP Switch SW1 Active-High 24FPGA Mode DIP Switch SW1Vita 57.1 FMC LPC Connector 28VITA 57.1 FMC LPC Connections LPC PinPower Management AC Adapter and 12V Input Power Jack/SwitchOnboard Power Regulation Power ManagementUCD9240PFC Configuration Options 30SP605 Fpga Configuration Modes M10 Bus WidthConfiguration Solution User Guide Section SP605 Evaluation Board Table A-1Default Switch Settings Function/Type DefaultFMC Jtag Vita 57.1 FMC LPC Connector Pinout Appendix B Vita 57.1 FMC LPC Connector Pinout SP605 Master UCF Appendix C SP605 Master UCF NET FmcpwrgoodflashrstbNET Fpgacmpcsb NET MEM1LDQSN LOC NET Sysclkn Appendix C SP605 Master UCF References