Analog Devices ADSP-2192 specifications Release Number returned in the GET Device

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Current frame number
Address of device/active endpoint
Miscellaneous control including re-attach
16 bit counter
8 bytes total
8 bytes total
Comments
0x2XXX—This address range defines the registers used for REGIO accesses to the DSP register space
0x3XXX—This address range defines the MCU pro- gram memory write address space
0x0XXX—This address range defines general purpose USB status and control registers
0x1XXX—This address range defines registers that are specific to endpoint setup and control
0x0016- 0x0017
USB Frame Number
0x0014- 0x0015
USB Address/Endpoint
0x0012- 0x0013
USB Control
0x0010- 0x0011
USB SETUP Counter
0x0008- 0x000F
USB SETUP Token Data
0x0000- 0x0007
USB SETUP Token Cmd
Name
Address
Table 12. USB MCU Register Definitions
P[15:0] = Product ID (default = 0x2192)
•
USB Descriptor Product ID
The Product ID returned in the GET DEVICE DESCRIP- TOR command is contained in this register. The DSP can change the Product ID by writing to this register during the Serial EEPROM initialization. The default Product ID is 0x2192.

 

 

 

 

 

 

Y

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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A

 

For current information contact Analog Devices at (781) 461-3881

 

 

 

October 2000

ADSP-2192

 

 

 

 

 

 

 

 

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Buffer Size Register

USB Descriptor Release Number

 

 

 

USB DSP MemoryI

 

 

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H

 

A

 

 

 

 

P

 

 

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The Release Number returned in the GET DEVICE

 

Indicates the size of the DSP memory buffer assigned to this

 

 

E

 

T

 

 

 

 

 

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DESCRIPTOR command is contained in this register. The

 

 

endpoint.

 

 

 

 

 

 

 

 

D

 

 

 

 

DSP can change the Release Number by writing to this reg-

 

 

• SZ[15:0] = Memory Buffer Size

 

 

ister during the Serial EEPROM initialization. The default

 

 

 

 

 

 

 

 

 

 

 

USB DSP Memory Buffer RD Pointer Offset Register

Release Number is 0x0100, which corresponds to

 

 

The offset from the base address for the read pointer of the

Version 01.00.

 

 

 

 

 

 

 

memory buffer assigned to this endpoint.

• R[15:0] = Release Number (default = 0x0100)

 

 

• RD[15:0] = Memory Buffer RD Offset

USB Descriptor Device Attributes

 

 

 

 

 

 

 

 

 

 

 

 

 

USB DSP Memory Buffer WR Pointer Offset Register

The device-specific attributes returned in the GET

 

 

The offset from the base address for the write pointer of the

DEVICE DESCRIPTOR command are contained in this

 

 

register. The DSP can change the attributes by writing to

 

 

memory buffer assigned to this endpoint.

 

 

this register during the Serial EEPROM initialization. The

 

 

• WR[15:0] = Memory Buffer WR Offset

 

 

default attributes are 0x80FA, which correspond to

 

 

 

 

 

 

 

 

 

 

 

USB Descriptor Vendor ID

 

bus-powered, no remote wake-up, and

 

 

 

 

max power = 500mA.

 

 

 

The Vendor ID returned in the GET DEVICE DESCRIP-

 

 

 

• SP: 1=self-powered, 0=bus-powered (default = 0)

 

 

TOR command is contained in this register. The DSP can

 

 

 

 

 

 

change the Vendor ID by writing to this register during the

• RW: 1=have remote wake-up capability, 0=no remote

 

 

Serial EEPROM initialization. The default Vendor ID is

wake-up capability (default = 0)

 

 

 

0x0456, which corresponds to Analog Devices, Inc.

• C[7:0] = power consumption from bus, expressed in

 

 

 

 

 

 

 

 

 

 

 

• V[15:0] = Vendor ID (default = 0x0456)

2mA units (default = 0xFA 500mA)

USB DSP MCU Register Definitions

MCU registers are defined in four memory spaces that are grouped by the following address ranges:

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0x0030- 0x0031

USB Serial EEPROM Mailbox 1

Defined by ADI

 

 

 

 

 

 

Y

 

 

 

 

 

 

 

 

 

 

0x0032- 0x0033

USB Serial EEPROM Mailbox 2

Defined by ADI

 

 

 

 

 

 

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0x0034- 0x0035

USB Serial EEPROM Mailbox 3

Defined by ADI

 

 

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REV. PrA

This information applies to a product under development. Its characteristics and specifications are subjectPto change with-

 

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out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed toEin writing.

 

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Contents Preliminary Technical Data Words on-chip 16-bit RAM for Data Memory and 16K 48K words of on-chip RAM on P1, configured as 32KREV. PrA Rupts. a 16-bit count register Tcount is decremented Programmable interval timer generates periodic interOutput DSP-DSP Semaphore DSP-DSP Interrupt DSP-DSPADSP-2192 Loop stack interrupt enableIfication. This interface supports the high data rates Industry standard AC’97 serial interface AC-LinkADSP-2192 includes a 33MHz, 32 bit bus master PCI Pliant codecs to the ADSP-2192. The ACLink implementsBAR3 registers appear in on page 14 and Table DSP memory accesses use BAR2 or BAR3 of each funcTion. BAR2 is used to access 24-bit DSP memory BAR3 DSP, using the REG instructionRpci Dmah controller can be programmed to perform scat Mode the functions of the registers are mapped as followsADSP-2192 without processor intervention. In scat Tx0 DMA Channel Interrupt Transmit Channel 0 Bus Master TransactionsBist Target accessesI to registers and DSP memory can goRthroughHany function. As long as the Memory Space access Register or memory location within the ADSP-2192. SimiInta Data Word. BAR3 Mode is typically used for Data MemoryPCI Dword BYTE3 BYTE2 BYTE1 BYTE0 Reserved UnusedA15 9FFC 7FFC0x8-0x9 DSP Memory Buffer WR Offset 0x0-0x3 DSP Memory Buffer Base Addr0x4-0x5 DSP Memory Buffer Size 0x6-0x7 DSP Memory Buffer RD OffsetEP8 EP5EP6 EP7Device-specific attributes returned in the GET Descriptor command is contained in this register.Release Number returned in the GET Device Release Number is 0x0100, which corresponds toUSB EP7 NAK USB EP4 NAKUSB EP5 NAK USB EP6 NAKA21 Fixed Endpoints Control Endpoint ISE = Current interrupt is for a Setup tokenINT = Active interrupt for the 8052 MCU ThisR registerHprovides information as the total sizeADI 0x01 0x02 0x00REV. PrA A23 XXX USB McucodeAddress USB RegioBRequest 0xA0 WValue LWValue H A27 Packetsize, theNUSB core accepts it, as long as there is If for some reason the host sends more data than the maxSufficientCroom in theAFIFO Pmeen output from the Combo Master should Power themselves and the ADSP-2192 completely downDeassertion of PDW1 high causes a wake-up of the DSP An active lowIRST input to be derived from PCI RSTFifo Is shown as a no connect in on page 33 these SMSelIBit 3 Stereo / Mono Select AC’97 ModeInterfaces reset the DSP under their control as needed Eslot Bits 7-4 AC’97 Slot Select AC’97 Mode OnlyADSP-2192 can be clocked by a crystal oscillator. If a ADSP-2192 Boot Process FlowManufacturer.I a parallel-resonant, fundamental frequency ForEthis configuration.TRmicroprocessorH -grade 24.576 MHz crystal should be used Run-time library that includes DSP and mathematical func Tion-level simulator a C/C++ compiler and a C/C++A35 AD3 AD0AD1 AD2131 128 PCI / ISA Interrupt CBE0 CBE1 CBE2 CBE3 CLK130 Clkrun Devsel Frame GNT Idsel IntabPcivdd IrdyPAR PcigndEmulator Event Pin Emulator Clock Input Emulator Data Input Emulator Logic Reset Emulator Mode SelectEmulator Data Output Ctrlaux Ctrlvdd Ignd Acvaux Aiognd AvddIvdd Rvaux Rvdd TBD Specifications are subject to changeVIN=2.5V Supply Current Dynamic @ 160 Mips InternalSupply Current Idle Input Capacitance6 FIN=1 MHzIOR / IOW Strobe Width 100 AEN Setup to IOR / IOW FallingAddress Setup to IOR / IOW Falling Write Data Setup to IOW RisingSub-ISA Interface Write Cycle Timing Diagram TBD C/W REV. PrA A47 CREV. PrA a A49 Ordering Guide

ADSP-2192 specifications

The Analog Devices ADSP-2192 is a high-performance digital signal processor (DSP) that stands out in the realm of signal processing applications. The device is part of the ADSP-2100 family, which has been recognized for its ability to deliver high-speed computations and efficient processing capabilities. The ADSP-2192 is particularly well-suited for applications requiring advanced digital signal processing, such as telecommunications, audio processing, and industrial control systems.

One of the key features of the ADSP-2192 is its dual-core architecture. This allows for parallel processing capabilities, enabling the device to handle multiple tasks simultaneously. Each core can execute instructions independently, which significantly boosts the overall processing power. The device is built on a 16-bit architecture, supporting 16-bit fixed-point and 40-bit floating-point operations, allowing for a wide range of precision in calculations.

The ADSP-2192 also incorporates a sophisticated instruction set designed for efficient performance. It includes specialized instructions tailored for common signal processing tasks, such as filtering and Fourier transforms. This optimized instruction set enhances the speed and efficiency of data manipulation and computation, making it an ideal choice for real-time applications.

In terms of memory, the ADSP-2192 is equipped with 1 KB of on-chip program memory and 2 KB of data memory. This provides sufficient storage for handling complex algorithms without the need for external memory, reducing latency and increasing processing speed. The device also supports external memory interfaces, enabling developers to expand the system's memory capacity if needed.

Another standout feature of the ADSP-2192 is its rich set of communication interfaces. It supports a variety of communication protocols, including SPI, USART, and I2C, facilitating seamless integration with other devices and systems. This versatility makes it suitable for a wide range of applications, from consumer electronics to industrial automation.

In terms of power consumption, the ADSP-2192 is designed to be energy-efficient, making it an excellent choice for battery-operated devices and applications requiring low power usage. The device operates at a voltage range of 3V to 5V, making it compatible with various power supply systems.

Overall, the Analog Devices ADSP-2192 combines powerful processing capabilities with efficient resource management and versatility, making it a strong contender in the DSP market. Its dual-core architecture, robust instruction set, communication flexibility, and energy-efficient design position it as an essential component for advanced signal processing applications across multiple industries.
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