Analog Devices ADSP-2192 specifications Industry standard AC’97 serial interface AC-Link

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For current information contact Analog Devices at (781) 461-3881

 

 

 

 

 

 

 

 

 

 

October 2000

ADSP-2192

 

 

 

 

 

 

 

 

 

 

 

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AC’97 2.1 External Codec Interface

 

 

 

 

 

 

 

 

 

 

PCI 2.2 HostIInterface

 

 

 

 

 

 

 

 

 

 

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The industry standard AC’97 serial interface (AC-Link)

 

The ADSP-2192 includes a 33MHz, 32 bit bus master PCI

 

 

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incorporates a 7-pin digital serial interface that links com-

 

 

interface that is compliant with revision 2.2 of the PCI spec-

 

 

 

 

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pliant codecs to the ADSP-2192. The ACLink implements

 

 

ification. This interface supports the high data rates.

 

 

USB 1.1 Host Interface.

 

a bi-directional, fixed rate, serial PCM digital stream. It

 

 

 

handles multiple input and output audio streams as well as

 

 

 

 

 

 

 

 

 

 

The ADSP-2192 USB interface enables the host system to

control and status register accesses using a time division

 

 

configure and attach a single device with multiple interfaces

multiplex scheme.

 

 

 

 

 

 

 

 

 

 

and various endpoint configurations. The advantages of this

Serial EEPROM Interface

 

 

 

 

 

 

 

 

 

 

design include:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

• Programmable descriptors and class-specific command

The Serial EEPROM for the ADSP-2192 can overwrite the

 

 

following information which is returned during the USB

 

 

 

interpreter.

 

 

 

 

 

 

 

GET DEVICE DESCRIPTOR command. During the

 

 

 

 

• An on-chip 8052 compatible MCU allows the user to

 

 

 

 

Serial EEPROM initialization procedure, the DSP is

 

 

 

 

 

soft download different configurations and support

 

 

 

 

 

responsible for writing the USB Descriptor Vendor ID,

 

 

 

standard or class-specific commands.

 

 

 

USB Descriptor Product ID, USB Descriptor Release

 

 

 

 

• Total of 8 user-defined endpoints provided. Endpoints

 

 

 

 

Number, and USB Descriptor Device Attributes registers

 

 

 

can be configured as either BULK, ISO, or INT and

to change the default settings.

 

 

 

 

 

 

 

 

 

 

 

can be grouped and assigned to any interface.

All descriptors can be changed when downloading the

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Sub-ISA Interface

 

RAM-based MCU re-numeration code, except for the

 

 

 

 

In systems which combine the ADSP-2192 chip with other

Manufacturer and Product, which are supported in the

 

 

CONFIG DEVICE and cannot be overwritten or changed

 

 

devices on a single PCI interface, the ADSP-2192 Sub-ISA

 

 

by the Serial EEPROM.

 

 

 

 

 

 

 

 

 

 

mode is used to provide a simpler interface which bypasses

 

 

 

 

 

 

 

 

 

 

• Vendor ID (0x0456 ADI)

 

 

 

 

 

 

 

 

 

 

the ADSP-2192’s PCI interface. In this mode the Combo

 

 

 

 

 

 

 

 

 

 

Master assumes all responsibility for interfacing the func-

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Product ID (0x2192)

 

 

 

 

 

 

 

 

 

 

tion to the PCI bus, including provision of Configuration

• Device Release Number (0x0100)

 

 

 

 

 

 

 

 

 

 

Space registers for the ADSP-2192 system as a separate

 

 

 

 

 

 

 

 

 

 

• Device Attributes (0x80FA): SP (1=self-powered,

 

 

 

 

PnP function. In Sub-ISA Mode the PCI Pins are reconfig-

 

 

 

 

 

0=bus-powered, default=0); RW (1=have remote

 

 

 

 

ured for ISA operation.

 

 

 

 

 

 

 

 

wake-up capability, 0=no remote wake-up capability,

 

 

 

 

 

 

 

 

 

 

 

CardBus Interface

 

 

deafult=0); C[7:0] (power consumption from bus

 

 

 

 

The CardBus standard provides higher levels of perfor-

 

expressed in 2mA units; default = 0xFA 500mA)

 

 

 

 

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Manufacturer (ADI)

 

 

 

 

 

 

 

 

 

 

mance than the 16-bit PC Card standard. For example,

 

 

 

 

 

 

 

 

 

 

32-bit CardBus cards are able to take advantage of internal

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Product (ADI Device)

 

 

 

 

 

 

 

 

 

 

bus speeds that can be as much as four- to six-times faster

Internal Interfaces

 

 

 

 

 

 

 

 

 

 

than 16-bit PC Cards. This design provides for a compact,

 

 

 

 

 

 

 

 

 

 

rugged card that can be inserted completely within its host

The ADSP-2192 provides three types of internal interfaces:

 

 

computer without any external cabling.

registers, codec, and DSP memory buses. The following

 

 

Since CardBus performance attains the same high level as

sections discuss those interfaces.

 

 

 

 

 

 

 

 

 

 

the host platform's internal (PCI) system bus, it is an excel-

Register Interface

 

 

 

 

 

 

 

 

 

 

lent way to add high speed communications to the notebook

 

 

 

 

 

 

 

 

 

 

The register interface allows the PCI interface, USB inter-

 

 

form factor. In addition, CardBus PC Cards operate at a

 

 

power-saving 3.3 volts, extending battery life in most

face, and both DSPs to communicate with the I/O

 

 

 

 

 

configurations.

 

 

Registers. These registers map into DSP, PCI, and USB I/O

 

 

This new 32-bit CardBus technology provides up to

spaces.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

132Mbytes per second of bandwidth. This performance

Register Spaces

 

 

 

 

 

 

 

 

 

 

makes CardBus an ideal vehicle to furnish the demands of

Several different register spaces are defined on the

 

 

 

 

 

high throughput communications such as ADSL.

 

 

 

 

 

ADSP-2192, as described in the following sections.

 

 

 

 

 

CardBus PC Cards generate less heat and consume less

 

 

 

 

 

PCI Configuration Space

 

 

 

 

 

 

 

 

 

 

power. This is attained by:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

These registers control the configuration of the PCI Inter-Y

 

 

• Low voltage operation at 3.3V.

 

 

 

 

 

 

 

 

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face. Most of these registers are only accessible via theAPCI

 

 

• Software control of clock speed.

 

 

 

 

 

 

 

IN

 

 

 

 

 

 

 

 

 

 

Bus although a subset is accessible to the DSP for configu-L

 

 

• Advanced power management mechanism

 

 

 

 

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ration during the boot.

 

 

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This information applies to a product under development. Its characteristics and specifications are subjectPto change with-

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out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed toEin writing.

 

 

 

 

 

 

 

 

 

 

 

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Contents Preliminary Technical Data Words on-chip 16-bit RAM for Data Memory and 16K 48K words of on-chip RAM on P1, configured as 32KREV. PrA Rupts. a 16-bit count register Tcount is decremented Programmable interval timer generates periodic interOutput DSP-DSP Semaphore DSP-DSP Interrupt DSP-DSPADSP-2192 Loop stack interrupt enableIfication. This interface supports the high data rates Industry standard AC’97 serial interface AC-LinkADSP-2192 includes a 33MHz, 32 bit bus master PCI Pliant codecs to the ADSP-2192. The ACLink implementsBAR3 registers appear in on page 14 and Table DSP memory accesses use BAR2 or BAR3 of each funcTion. BAR2 is used to access 24-bit DSP memory BAR3 DSP, using the REG instructionRpci Dmah controller can be programmed to perform scat Mode the functions of the registers are mapped as followsADSP-2192 without processor intervention. In scat Tx0 DMA Channel Interrupt Transmit Channel 0 Bus Master TransactionsBist Target accessesI to registers and DSP memory can goRthroughHany function. As long as the Memory Space access Register or memory location within the ADSP-2192. SimiInta Data Word. BAR3 Mode is typically used for Data MemoryPCI Dword BYTE3 BYTE2 BYTE1 BYTE0 Reserved UnusedA15 9FFC 7FFC0x8-0x9 DSP Memory Buffer WR Offset 0x0-0x3 DSP Memory Buffer Base Addr0x4-0x5 DSP Memory Buffer Size 0x6-0x7 DSP Memory Buffer RD OffsetEP8 EP5EP6 EP7Device-specific attributes returned in the GET Descriptor command is contained in this register.Release Number returned in the GET Device Release Number is 0x0100, which corresponds toUSB EP7 NAK USB EP4 NAKUSB EP5 NAK USB EP6 NAKA21 Fixed Endpoints Control Endpoint ISE = Current interrupt is for a Setup tokenINT = Active interrupt for the 8052 MCU ThisR registerHprovides information as the total sizeADI 0x01 0x02 0x00REV. PrA A23 XXX USB McucodeAddress USB RegioBRequest 0xA0 WValue LWValue H A27 Packetsize, theNUSB core accepts it, as long as there is If for some reason the host sends more data than the maxSufficientCroom in theAFIFO Pmeen output from the Combo Master should Power themselves and the ADSP-2192 completely downDeassertion of PDW1 high causes a wake-up of the DSP An active lowIRST input to be derived from PCI RSTFifo Is shown as a no connect in on page 33 these SMSelIBit 3 Stereo / Mono Select AC’97 ModeInterfaces reset the DSP under their control as needed Eslot Bits 7-4 AC’97 Slot Select AC’97 Mode OnlyADSP-2192 can be clocked by a crystal oscillator. If a ADSP-2192 Boot Process FlowManufacturer.I a parallel-resonant, fundamental frequency ForEthis configuration.TRmicroprocessorH -grade 24.576 MHz crystal should be used Run-time library that includes DSP and mathematical func Tion-level simulator a C/C++ compiler and a C/C++A35 AD3 AD0AD1 AD2131 128 PCI / ISA Interrupt CBE0 CBE1 CBE2 CBE3 CLK130 Clkrun Devsel Frame GNT Idsel IntabPcivdd IrdyPAR PcigndEmulator Event Pin Emulator Clock Input Emulator Data Input Emulator Logic Reset Emulator Mode SelectEmulator Data Output Ctrlaux Ctrlvdd Ignd Acvaux Aiognd AvddIvdd Rvaux Rvdd TBD Specifications are subject to changeVIN=2.5V Supply Current Dynamic @ 160 Mips InternalSupply Current Idle Input Capacitance6 FIN=1 MHzIOR / IOW Strobe Width 100 AEN Setup to IOR / IOW FallingAddress Setup to IOR / IOW Falling Write Data Setup to IOW RisingSub-ISA Interface Write Cycle Timing Diagram TBD C/W REV. PrA A47 CREV. PrA a A49 Ordering Guide

ADSP-2192 specifications

The Analog Devices ADSP-2192 is a high-performance digital signal processor (DSP) that stands out in the realm of signal processing applications. The device is part of the ADSP-2100 family, which has been recognized for its ability to deliver high-speed computations and efficient processing capabilities. The ADSP-2192 is particularly well-suited for applications requiring advanced digital signal processing, such as telecommunications, audio processing, and industrial control systems.

One of the key features of the ADSP-2192 is its dual-core architecture. This allows for parallel processing capabilities, enabling the device to handle multiple tasks simultaneously. Each core can execute instructions independently, which significantly boosts the overall processing power. The device is built on a 16-bit architecture, supporting 16-bit fixed-point and 40-bit floating-point operations, allowing for a wide range of precision in calculations.

The ADSP-2192 also incorporates a sophisticated instruction set designed for efficient performance. It includes specialized instructions tailored for common signal processing tasks, such as filtering and Fourier transforms. This optimized instruction set enhances the speed and efficiency of data manipulation and computation, making it an ideal choice for real-time applications.

In terms of memory, the ADSP-2192 is equipped with 1 KB of on-chip program memory and 2 KB of data memory. This provides sufficient storage for handling complex algorithms without the need for external memory, reducing latency and increasing processing speed. The device also supports external memory interfaces, enabling developers to expand the system's memory capacity if needed.

Another standout feature of the ADSP-2192 is its rich set of communication interfaces. It supports a variety of communication protocols, including SPI, USART, and I2C, facilitating seamless integration with other devices and systems. This versatility makes it suitable for a wide range of applications, from consumer electronics to industrial automation.

In terms of power consumption, the ADSP-2192 is designed to be energy-efficient, making it an excellent choice for battery-operated devices and applications requiring low power usage. The device operates at a voltage range of 3V to 5V, making it compatible with various power supply systems.

Overall, the Analog Devices ADSP-2192 combines powerful processing capabilities with efficient resource management and versatility, making it a strong contender in the DSP market. Its dual-core architecture, robust instruction set, communication flexibility, and energy-efficient design position it as an essential component for advanced signal processing applications across multiple industries.
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