Samsung M391B5273DH0 specifications IDD Spec Table, M391B5773DH0 2GB256Mx72 Module

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Unbuffered DIMM

datasheet

Rev. 1.0

DDR3L SDRAM

14. IDD SPEC Table

M391B5773DH0 : 2GB(256Mx72) Module

 

DDR3-1066

DDR3-1333

DDR3-1600

 

 

Symbol

 

7-7-7

 

9-9-9

11-11-11

 

Unit

NOTE

 

1.35V

 

1.5V

1.35V

 

1.5V

1.35V

 

1.5V

 

 

IDD0

270

 

315

315

 

360

360

 

405

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD1

360

 

405

405

 

450

450

 

495

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD2P0(slow exit)

90

 

108

90

 

108

90

 

108

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD2P1(fast exit)

117

 

135

117

 

135

135

 

135

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD2N

135

 

153

135

 

180

153

 

180

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD2Q

135

 

153

135

 

180

153

 

180

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD3P

135

 

153

135

 

153

153

 

180

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD3N

225

 

270

225

 

315

270

 

315

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD4R

495

 

585

630

 

675

720

 

810

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD4W

540

 

630

675

 

720

810

 

855

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD5B

990

 

990

1035

 

1035

1035

 

1080

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD6

90

 

108

90

 

108

90

 

108

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD7

900

 

945

1125

 

1215

1170

 

1260

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD8

90

 

108

90

 

108

90

 

108

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

NOTE :

1. DIMM IDD SPEC is calculated with considering de-actived rank(IDLE) is IDD2N.

M391B5273DH0 : 4GB(512Mx72) Module

 

DDR3-1066

DDR3-1333

DDR3-1600

 

 

Symbol

 

7-7-7

 

9-9-9

11-11-11

 

Unit

NOTE

 

1.35V

 

1.5V

1.35V

 

1.5V

1.35V

 

1.5V

 

 

IDD0

405

 

468

450

 

540

513

 

585

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD1

495

 

558

540

 

630

603

 

675

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD2P0(slow exit)

180

 

216

180

 

216

180

 

216

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD2P1(fast exit)

234

 

270

234

 

270

270

 

270

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD2N

270

 

306

270

 

360

306

 

360

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD2Q

270

 

306

270

 

360

306

 

360

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD3P

270

 

306

270

 

306

306

 

360

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD3N

360

 

423

360

 

495

423

 

495

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD4R

630

 

738

765

 

855

873

 

990

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD4W

675

 

783

810

 

900

963

 

1035

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD5B

1125

 

1143

1170

 

1215

1188

 

1260

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD6

243

 

216

270

 

216

288

 

216

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD7

1035

 

1098

1260

 

1395

1323

 

1440

mA

1

 

 

 

 

 

 

 

 

 

 

 

 

IDD8

243

 

216

270

 

216

288

 

216

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

NOTE :

1. DIMM IDD SPEC is calculated with considering de-actived rank(IDLE) is IDD2N.

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Contents Datasheet Rev History Draft DateTable Of Contents Key Features Address ConfigurationDDR3L Unbuffered Dimm Ordering Information Speed DDR3-800 DDR3-1066 DDR3-1333 DDR3-1600 UnitX72 Dimm Pin Configurations Front side/Back side Pin Front BackPin Description SPD and Thermal Sensor for ECC UDIMMsPin Name Description Symbol Type Function Input/Output Functional DescriptionAddress Mirroring Feature Dram Pin Wiring MirroringConnector Pin Dram Pin Rank Function Block Diagram SCL SDA Event SA0 SA1 SA2D14 Dram Component Operating Temperature Range Absolute Maximum RatingsAC & DC Operating Conditions Absolute Maximum DC Ratings11.1 AC & DC Logic Input Levels for Single-ended Signals AC & DC Input Measurement LevelsVIH.DQDC90 Vref Tolerances Illustration of Vrefdc tolerance and Vref ac-noise limitsAC and DC Logic Input Levels for Differential Signals Differential Signals Definition35V TBD Single-ended Requirements for Differential Signals TimeDifferential Input Cross Point Voltage CK, DQS VselSlew Rate Definition for Single Ended Input Signals Slew rate definition for Differential Input SignalsAC & DC Output Measurement Levels Single Ended AC and DC Output LevelsSingle-ended Output Slew Rate SRQseDifferential Output Slew Rate Differential output slew rate definitionIDD specification definition Symbol DescriptionDatasheet DDR3-1066 DDR3-1333 DDR3-1600 Symbol 11-11-11 Unit IDD Spec TableM391B5773DH0 2GB256Mx72 Module M391B5273DH0 4GB512Mx72 ModuleInput/Output Capacitance CZQElectrical Characteristics and AC timing Refresh Parameters by Device DensityDDR3-1066 Speed Bins Speed Bin Table Notes DDR3-1600 Speed Bins CL-nRCD-nRPDatasheet Timing Parameters by Speed Grade Timing Parameters by Speed BinMIN MAX Reset Timing Jitter Notes Timing Parameter Notes ZQCorrection TSens x Tdriftrate + VSens x VdriftratePhysical Dimensions 18.1 256Mbx8 based 256Mx72 Module 1 Rank M391B5773DH018.2 256Mbx8 based 512Mx72 Module 2 Ranks M391B5273DH0