Unbuffered DIMM
datasheet
Rev. 1.0
DDR3L SDRAM
16. Electrical Characteristics and AC timing
[0 °C<TCASE ≤95 °C, VDDQ = 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V); VDD = 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V)]
16.1 Refresh Parameters by Device Density
Parameter |
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| Symbol | 1Gb | 2Gb | 4Gb | 8Gb | Units | NOTE | |
All Bank Refresh to active/refresh cmd time |
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| tRFC | 110 | 160 | 300 | 350 | ns |
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Average periodic refresh interval | tREFI | 0 °C ≤ TCASE ≤ 85°C | 7.8 | 7.8 | 7.8 | 7.8 | ∝s |
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85 | °C < TCASE ≤ 95°C | 3.9 | 3.9 | 3.9 | 3.9 | ∝s | 1 | |||
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NOTE :
1.Users should refer to the DRAM supplier data sheet and/or the DIMM SPD to determine if DDR3 SDRAM devices support the following options or requirements referred to in this material.
16.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
Speed |
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Bin (CL - tRCD - tRP) | Units | NOTE | ||||
Parameter | min | min | min | min |
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CL | 6 | 7 | 9 | 11 | tCK |
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tRCD | 15 | 13.13 | 13.5 | 13.75 | ns |
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tRP | 15 | 13.13 | 13.5 | 13.75 | ns |
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tRAS | 37.5 | 37.5 | 36 | 35 | ns |
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tRC | 52.5 | 50.63 | 49.5 | 48.75 | ns |
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tRRD | 10 | 7.5 | 6.0 | 6.0 | ns |
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tFAW | 40 | 37.5 | 30 | 30 | ns |
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16.3 Speed Bins and CL, tRCD, tRP, tRC and tRAS for corresponding Bin
DDR3 SDRAM Speed Bins include tCK, tRCD, tRP, tRAS and tRC for each corresponding bin.
[ Table 17 ]
Speed |
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| 6 - 6 - 6 |
| Units | NOTE | ||
Parameter | Symbol | min |
| max |
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Internal read command to first data | tAA | 15 |
| 20 | ns |
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ACT to internal read or write delay time | tRCD | 15 |
| - | ns |
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PRE command period | tRP | 15 |
| - | ns |
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ACT to ACT or REF command period | tRC | 52.5 |
| - | ns |
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ACT to PRE command period | tRAS | 37.5 |
| 9*tREFI | ns |
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CL = 6 / CWL = 5 | tCK(AVG) | 2.5 |
| 3.3 | ns | 1,2,3 |
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Supported CL Settings |
| 6 |
| nCK |
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Supported CWL Settings |
| 5 |
| nCK |
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