Intel 273246-002 manual Getting Started

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Getting Started

3. Make sure the board’s jumpers are set to the following default locations.

J14 - Not installed

J15 - Installed

J20 - Jumper pins 2-3

J21 - Jumper pins 2-3

J22 - Jumper pins 2-3

J23 - Jumper pins 2-3

J24 - Jumper pins 1-2

4. Mount the hardware:

Table-top operation: The evaluation board is shipped with standoff “feet” for use in a table-top environment. These feet are installed on the evaluation board to raise it off the table surface.Your kit contains two bags of mounting hardware. One bag contains eight standoff feet, eight mounting screws, and eight washers. Another bag has three shorter feet that must be attached slightly differently.

To mount the eight standard feet, insert a washer onto a screw, then push the screw through the top of the board. From below the board, thread one of the longer feet onto the screw.

— To mount the three special feet, screw the three shorter feet onto the existing screws. See Figure 2-1for the location of the three special holes.

Warning: Do not remove the nuts from these three holes! This will detach the processor assembly from the baseboard, and Intel will no longer support the evaluation board.

The evaluation board is not ATX compatible.

5.Connect desired storage devices to the evaluation board:

The evaluation board supports Primary and Secondary IDE interfaces that can each host one or two devices (master/slave). When you are using multiple devices, such as a hard disk and a CD-ROM drive, make sure the hard disk drive has a jumper in the master position and the CD- ROM has a jumper in the slave position. When you are using a single IDE device with the evaluation board, be sure that the jumpers set correctly for single master operation. For jumper settings for other configurations, consult the drive’s documentation.

Note: The evaluation board BIOS only supports hard drives of 16 Gbytes or less.

Installing the IDE hard disk drive included in your kit:

Connect the hard drive’s IDE connector to the JP4 connector on the evaluation board. Be sure to align Pin 1 of the cable connector with pin 1 of JP4.

Connect the other end to the hard disk drive.

Caution: Make sure the tracer on the ribbon cable is aligned with pin 1 on both the hard disk and the IDE connector header. Connecting the cable backwards can damage the evaluation board or the hard disk.

— Connect the hard drive to the power supply.

Note: The hard disk is already formatted and is pre-loaded with the QNX Real-Time Operating System for Intel Architecture.

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Celeron™ Processor Development Kit Manual

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Contents Celeron Processor Development Kit ManualCeleron Processor Development Kit Manual Contents Hardware Reference Figures TablesPage Content Overview Text ConventionsTechnical Support Electronic Support SystemsProduct Literature Telephone Technical SupportRelated Documents Processor Assembly Features OverviewBaseboard Features Included HardwareSoftware Key Features General Software, IncBefore You Begin VGA MonitorSetting up the Evaluation Board Evaluation Board Jumpers and ConnectorsGetting Started Configuring the Bios Page Block Diagram Evaluation Board Block DiagramCeleron Processor System Operation2 82443BX Host Bridge/Controller 3 ITP System Bus InterfacePower Boot ROM4 82371EB PCI to ISA/IDE Xcelerator PIIX4E DramPCI Connectors ISA ConnectorsAGP Connector IDE SupportPost Code Debugger Clock GenerationInterrupt Map InterruptsMemory Map Memory MapSize Description Page Processor Assembly Post Code DebuggerThermal Management ITP Debugger PortISA and PCI Expansion Slots PCI Device MappingPCI Device Mapping Device Address Line PCI Device NumberConnector Pinouts ATX Power ConnectorPrimary Power Connector J11 Pin Name FunctionITP Debugger Connector ITP Connector Pin Assignment J2 on the Processor AssemblyUSB Connector Pinout J2 Stacked USBMouse and Keyboard Connectors Keyboard and Mouse Connector Pinouts J1 on the BaseboardDB25 Parallel Port Connector Pinout J3 Pin Signal NameIDE Connector Serial Port Connector Pinout J4PCI IDE1 JP3 and IDE2 JP4 Connector Serial PortsFloppy Drive Connector Diskette Drive Header Connector JP1PCI Slot Connector 10. PCI Slots J7, J8, J9ISA Slot Connector 11. ISA Slots J5, J612. AGP Slot J13 AGP ConnectorPin# Enable Spread Spectrum Clocking J14 13. Default Jumper SettingsJumpers Clock Frequency Selection J15Flash Bios VPP Select J21 Flash Bios Boot Block Control J22Push Button Switches 6 SMI# Source Control J23In-Circuit Bios Update Page Bios and Pre-Boot Features Power-On Self-Test PostBios Post Pre-Boot Environment Setup Screen System Basic Cmos Configuration ScreenConfiguring Drive Assignments Embedded Bios Basic Setup ScreenIDE0-IDE3 Drive Assignments Configuring IDE Drive TypesFile System Name Controller Master/Slave Configuring Boot Actions Custom Configuration Setup ScreenShadow Configuration Setup Screen Embedded Bios Custom Setup ScreenStandard Diagnostics Routines Setup Screen Start System Bios Debugger Setup ScreenManufacturing Mode Start RS232 Manufacturing Link Setup ScreenConsole Redirection Integrated Bios Debugger CE-Ready Windows CE LoaderIntegrated Bios Debugger Running Over a Remote Terminal Embedded Bios Post Codes Poststatusvideorom Poststatusbeforesetup Embedded Bios Beep Codes PostbeeprefreshPage PLD Code Listing PLD Code Listing Table B-1. Baseboard Bill of Materials Sheet 1 Reference Description Manufacturer Manufacturer P/NBios Flash Intel Table B-1. Baseboard Bill of Materials Sheet 2Table B-1. Baseboard Bill of Materials Sheet 3 Reference Description ManufacturerTable B-1. Baseboard Bill of Materials Sheet 4 SOIC20,SO20WReference Descriptions Manufacturer Manufacturer P/N ECJ-1VB1C104KERJ-6GEYJ472V Schematics Evaluation Platform System Electronic s Board PCI BUS Mini PCI Connector This Drawing Contains Information Which has not Socket DIMM1 DIMM2 This Drawing Contains Information Which has not This Drawing Contains Information Which Hasnot PCI Slot PCI Slot Been Verified for Manufacturing AS AN END Seru Title Been Verified for Manufacturing AS AN Enduser Title USB Secondary IDE Connector ISA/Host USB Connectors ISA Slots COM0/COM1 Port Speaker Header Unused Gates CeleronTM Processor Ppga Daughter Board ITP Pin Socket PRODUCT. Intel is not Responsible for GTL+ Termination RESISTORS-BX GTL+ Termination RESISTORS-CPU 82443BX BX Strapping Options Mounting Holes Thermal Sensor TIE Directly to Ground Plane Index Index-2