Intel 273246-002 manual Poststatusbeforesetup

Page 54

BIOS Quick Reference

POST_STATUS_BEFORESETUP

86h

Password accepted.

POST_STATUS_CALLSETUP

87h

Entering setup system.

POST_STATUS_POSTSETUP

88h

Setup system exited.

POST_STATUS_DISPPWRON

89h

Display power-on screen message.

POST_STATUS_DISPWAIT

8ah

Display "Wait..." message.

POST_STATUS_ENABSHADOW

8bh

Shadow system & video BIOS.

POST_STATUS_STDCMOSSETUP

8ch

Load standard setup values from CMOS.

POST_STATUS_MOUSE

8dh

Test and initialize mouse.

POST_STATUS_FLOPPY

8eh

Test floppy disks.

POST_STATUS_CONFIGFLOPPY

8fh

Configure floppy drives.

POST_STATUS_IDE

90h

Test hard disks.

POST_STATUS_CONFIGIDE

91h

Configure IDE drives.

POST_STATUS_CHECKSEG40G

92h

Checking ROM BIOS data area.

POST_STATUS_CHECKSEG40H

93h

Checking ROM BIOS data area.

POST_STATUS_SETMEMSIZE

94h

Set base & extended memory sizes.

POST_STATUS_SIZEADJUST

95h

Adjust low memory size for EBDA.

POST_STATUS_INITC8000

96h

Initialize before calling C800h ROM.

POST_STATUS_CALLC8000

97h

Call ROM BIOS extension at C800h.

POST_STATUS_POSTC8000

98h

ROM C800h extension returned.

POST_STATUS_TIMERPRNBASE

99h

Configure timer/printer data.

POST_STATUS_SERIALBASE

9ah

Configure serial port base addresses.

POST_STATUS_INITBEFORENPX

9bh

Prepare to initialize coprocessor.

POST_STATUS_INITNPX

9ch

Initialize numeric coprocessor.

POST_STATUS_POSTNPX

9dh

Numeric coprocessor initialized.

POST_STATUS_CHECKLOCKS

9eh

Check KB settings.

POST_STATUS_ISSUEKBDID

9fh

Issue keyboard ID command.

POST_STATUS_RESETID

0a0h

KB ID flag reset.

POST_STATUS_TESTCACHE

0a1h

Test cache memory.

POST_STATUS_DISPSOFTERR

0a2h

Display soft errors.

POST_STATUS_TYPEMATIC

0a3h

Set keyboard typematic rate.

POST_STATUS_MEMWAIT

0a4h

Program memory wait states.

POST_STATUS_CLRSCR

0a5h

Clear screen.

POST_STATUS_ENABPTYNMI

0a6h

Enable parity and NMIs.

POST_STATUS_INITE000

0a7h

Initialize before calling ROM at E000h.

POST_STATUS_CALLE000

0a8h

Call ROM BIOS extension at E000h.

POST_STATUS_POSTE000

0a9h

ROM extension returned.

POST_STATUS_DISPCONFIG

0b0h

Display system configuration box.

POST_STATUS_INT19BOOT

00h

Call INT 19h bootstrap loader.

POST_STATUS_LOWMEMEXH

0b1h

Test low memory exhaustively.

POST_STATUS_EXTMEMEXH

0b2h

Test extended memory exhaustively.

POST_STATUS_PCIENUM

0b3h

Enumerate PCI busses.

5-14

Celeron™ Processor Development Kit Manual

Image 54
Contents Celeron Processor Development Kit ManualCeleron Processor Development Kit Manual Contents Hardware Reference Figures TablesPage Content Overview Text ConventionsTechnical Support Electronic Support SystemsProduct Literature Telephone Technical SupportRelated Documents Processor Assembly Features OverviewBaseboard Features Included HardwareSoftware Key Features General Software, IncBefore You Begin VGA MonitorSetting up the Evaluation Board Evaluation Board Jumpers and ConnectorsGetting Started Configuring the Bios Page Block Diagram Evaluation Board Block DiagramSystem Operation Celeron Processor2 82443BX Host Bridge/Controller 3 ITP System Bus Interface4 82371EB PCI to ISA/IDE Xcelerator PIIX4E PowerBoot ROM DramAGP Connector PCI ConnectorsISA Connectors IDE SupportInterrupt Map Post Code DebuggerClock Generation InterruptsMemory Map Memory MapSize Description Page Thermal Management Processor AssemblyPost Code Debugger ITP Debugger PortPCI Device Mapping ISA and PCI Expansion SlotsPCI Device Mapping Device Address Line PCI Device NumberPrimary Power Connector J11 Connector PinoutsATX Power Connector Pin Name FunctionUSB Connector Pinout J2 ITP Debugger ConnectorITP Connector Pin Assignment J2 on the Processor Assembly Stacked USBDB25 Parallel Port Connector Pinout J3 Mouse and Keyboard ConnectorsKeyboard and Mouse Connector Pinouts J1 on the Baseboard Pin Signal NamePCI IDE1 JP3 and IDE2 JP4 Connector IDE ConnectorSerial Port Connector Pinout J4 Serial PortsFloppy Drive Connector Diskette Drive Header Connector JP1PCI Slot Connector 10. PCI Slots J7, J8, J9ISA Slot Connector 11. ISA Slots J5, J6AGP Connector 12. AGP Slot J13Pin# Jumpers Enable Spread Spectrum Clocking J1413. Default Jumper Settings Clock Frequency Selection J15Push Button Switches Flash Bios VPP Select J21Flash Bios Boot Block Control J22 6 SMI# Source Control J23In-Circuit Bios Update Page Bios and Pre-Boot Features Power-On Self-Test PostBios Post Pre-Boot Environment Setup Screen System Basic Cmos Configuration ScreenConfiguring Drive Assignments Embedded Bios Basic Setup ScreenConfiguring IDE Drive Types IDE0-IDE3 Drive AssignmentsFile System Name Controller Master/Slave Configuring Boot Actions Custom Configuration Setup ScreenShadow Configuration Setup Screen Embedded Bios Custom Setup ScreenStandard Diagnostics Routines Setup Screen Start System Bios Debugger Setup ScreenStart RS232 Manufacturing Link Setup Screen Manufacturing ModeConsole Redirection Integrated Bios Debugger CE-Ready Windows CE LoaderIntegrated Bios Debugger Running Over a Remote Terminal Embedded Bios Post Codes Poststatusvideorom Poststatusbeforesetup Embedded Bios Beep Codes PostbeeprefreshPage PLD Code Listing PLD Code Listing Table B-1. Baseboard Bill of Materials Sheet 1 Reference Description Manufacturer Manufacturer P/NBios Flash Intel Table B-1. Baseboard Bill of Materials Sheet 2Table B-1. Baseboard Bill of Materials Sheet 3 Reference Description ManufacturerTable B-1. Baseboard Bill of Materials Sheet 4 SOIC20,SO20WReference Descriptions Manufacturer Manufacturer P/N ECJ-1VB1C104KERJ-6GEYJ472V Schematics Evaluation Platform System Electronic s Board PCI BUS Mini PCI Connector This Drawing Contains Information Which has not Socket DIMM1 DIMM2 This Drawing Contains Information Which has not This Drawing Contains Information Which Hasnot PCI Slot PCI Slot Been Verified for Manufacturing AS AN END Seru Title Been Verified for Manufacturing AS AN Enduser Title USB Secondary IDE Connector ISA/Host USB Connectors ISA Slots COM0/COM1 Port Speaker Header Unused Gates CeleronTM Processor Ppga Daughter Board ITP Pin Socket PRODUCT. Intel is not Responsible for GTL+ Termination RESISTORS-BX GTL+ Termination RESISTORS-CPU 82443BX BX Strapping Options Mounting Holes Thermal Sensor TIE Directly to Ground Plane Index Index-2