Intel 273246-002 manual Embedded Bios Beep Codes, Postbeeprefresh

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BIOS Quick Reference

5.12Embedded BIOS Beep Codes

Embedded BIOS tests much of the system hardware early in POST before messages can be displayed on the screen. When system failures are encountered at these early stages, POST uses beep codes (a sequence of tones on the speaker) to identify the source of the error.

The following is a comprehensive list of POST beep codes for the system BIOS. BIOS extensions, such as VGA ROMs and SCSI adapter ROMs, may use their own beep codes, including short/long sequences, or possibly beep codes that sound like the ones below. When diagnosing a system failure, remove these adapters if possible before making a final determination of the actual POST test that failed.

Mnemonic Code

POST_BEEP_REFRESH

POST_BEEP_PARITY POST_BEEP_BASE64KB

POST_BEEP_TIMER POST_BEEP_CPU POST_BEEP_GATEA20

POST_BEEP_DMA POST_BEEP_VIDEO POST_BEEP_KEYBOARD POST_BEEP_SHUTDOWN POST_BEEP_CACHE POST_BEEP_BOARD POST_BEEP_LOWMEM POST_BEEP_EXTMEM POST_BEEP_CMOS POST_BEEP_ADDRESS_LINE POST_BEEP_DATA_LINE POST_BEEP_INTERRUPT POST_BEEP_PASSWORD

Beep CountDescription of Problem

1Memory refresh is not working.

2Parity error found in 1st 64KB of memory.

3Memory test of 1st 64KB failed.

4T1 timer test failed.

5CPU test failed.

6Gate A20 test failed.

7DMA page/base register test failed.

8Video controller test failed.

9Keyboard test failed.

10CMOS shutdown register test failed.

11External cache test failed.

12General board initialization failed.

13Exhaustive low memory test failed.

14Exhaustive extended memory test failed.

15CMOS restart byte test failed.

16Address line test failed.

17Data line test failed.

18Interrupt controller test failed.

1 Incorrect password used to access SETUP.

Celeron™ Processor Development Kit Manual

5-15

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Contents Development Kit Manual Celeron ProcessorCeleron Processor Development Kit Manual Contents Hardware Reference Tables FiguresPage Text Conventions Content OverviewElectronic Support Systems Technical SupportTelephone Technical Support Product LiteratureRelated Documents Overview Processor Assembly FeaturesIncluded Hardware Baseboard FeaturesGeneral Software, Inc Software Key FeaturesVGA Monitor Before You BeginEvaluation Board Jumpers and Connectors Setting up the Evaluation BoardGetting Started Configuring the Bios Page Evaluation Board Block Diagram Block DiagramCeleron Processor System Operation2 82443BX Host Bridge/Controller System Bus Interface 3 ITPDram PowerBoot ROM 4 82371EB PCI to ISA/IDE Xcelerator PIIX4EIDE Support PCI ConnectorsISA Connectors AGP ConnectorInterrupts Post Code DebuggerClock Generation Interrupt MapMemory Map Memory MapSize Description Page ITP Debugger Port Processor AssemblyPost Code Debugger Thermal ManagementDevice Address Line PCI Device Number ISA and PCI Expansion SlotsPCI Device Mapping PCI Device MappingPin Name Function Connector PinoutsATX Power Connector Primary Power Connector J11Stacked USB ITP Debugger ConnectorITP Connector Pin Assignment J2 on the Processor Assembly USB Connector Pinout J2Pin Signal Name Mouse and Keyboard ConnectorsKeyboard and Mouse Connector Pinouts J1 on the Baseboard DB25 Parallel Port Connector Pinout J3Serial Ports IDE ConnectorSerial Port Connector Pinout J4 PCI IDE1 JP3 and IDE2 JP4 ConnectorDiskette Drive Header Connector JP1 Floppy Drive Connector10. PCI Slots J7, J8, J9 PCI Slot Connector11. ISA Slots J5, J6 ISA Slot Connector12. AGP Slot J13 AGP ConnectorPin# Clock Frequency Selection J15 Enable Spread Spectrum Clocking J1413. Default Jumper Settings Jumpers6 SMI# Source Control J23 Flash Bios VPP Select J21Flash Bios Boot Block Control J22 Push Button SwitchesIn-Circuit Bios Update Page Power-On Self-Test Post Bios and Pre-Boot FeaturesBios Post Pre-Boot Environment Basic Cmos Configuration Screen Setup Screen SystemEmbedded Bios Basic Setup Screen Configuring Drive AssignmentsIDE0-IDE3 Drive Assignments Configuring IDE Drive TypesFile System Name Controller Master/Slave Custom Configuration Setup Screen Configuring Boot ActionsEmbedded Bios Custom Setup Screen Shadow Configuration Setup ScreenStart System Bios Debugger Setup Screen Standard Diagnostics Routines Setup ScreenManufacturing Mode Start RS232 Manufacturing Link Setup ScreenConsole Redirection CE-Ready Windows CE Loader Integrated Bios DebuggerIntegrated Bios Debugger Running Over a Remote Terminal Embedded Bios Post Codes Poststatusvideorom Poststatusbeforesetup Postbeeprefresh Embedded Bios Beep CodesPage PLD Code Listing PLD Code Listing Reference Description Manufacturer Manufacturer P/N Table B-1. Baseboard Bill of Materials Sheet 1Table B-1. Baseboard Bill of Materials Sheet 2 Bios Flash IntelReference Description Manufacturer Table B-1. Baseboard Bill of Materials Sheet 3SOIC20,SO20W Table B-1. Baseboard Bill of Materials Sheet 4ECJ-1VB1C104K Reference Descriptions Manufacturer Manufacturer P/NERJ-6GEYJ472V Schematics Evaluation Platform System Electronic s Board PCI BUS Mini PCI Connector This Drawing Contains Information Which has not Socket DIMM1 DIMM2 This Drawing Contains Information Which has not This Drawing Contains Information Which Hasnot PCI Slot PCI Slot Been Verified for Manufacturing AS AN END Seru Title Been Verified for Manufacturing AS AN Enduser Title USB Secondary IDE Connector ISA/Host USB Connectors ISA Slots COM0/COM1 Port Speaker Header Unused Gates CeleronTM Processor Ppga Daughter Board ITP Pin Socket PRODUCT. Intel is not Responsible for GTL+ Termination RESISTORS-BX GTL+ Termination RESISTORS-CPU 82443BX BX Strapping Options Mounting Holes Thermal Sensor TIE Directly to Ground Plane Index Index-2