Intel 273246-002 manual Secondary IDE Connector

Page 80

 

A

B

C

D

E

 

Primary IDE Connector

4

3

 

1 3

PDD[15:0]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IDERSTP#R

 

 

 

 

 

 

PDD7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PDD7

RP61 3 3

 

JP4

 

 

 

 

 

R 1 2 3

 

 

 

 

 

1

8

1

2

RP47

3 3

 

 

10k

 

 

 

 

 

PDD6

2

7

1

8

 

 

PDD8

 

 

 

 

 

3

4

 

 

 

 

 

R 1 0 7

 

PDD5

3

6

2

7

 

 

PDD9

 

 

 

 

5

6

 

 

 

 

 

8 .2K

 

PDD4

4

5

3

6

 

 

PDD10

 

 

 

 

7

8

 

 

 

 

 

 

 

 

 

 

 

4

5

 

 

PDD11

 

 

 

 

 

PDD3

1

8

 

9

1 0

RP44

3 3

 

 

 

 

 

 

1 1

1 2

 

 

 

 

 

 

 

 

PDD2

2

7

 

 

1

 

8

PDD12

 

 

 

 

 

 

1 3

1 4

 

 

 

 

 

 

 

PDD1

3

6

 

 

2

 

7

PDD13

 

 

 

 

 

 

1 5

1 6

 

 

 

 

 

 

 

PDD0

4

5

 

 

3

 

6

PDD14

 

 

 

 

 

 

1 7

1 8

 

 

 

 

 

RP58

3 3

RP60

3 3

 

 

4

 

5

PDD15

 

 

 

 

1 9

2 0

 

 

 

 

 

1

 

8

 

PDREQR

 

 

 

 

 

1 3

PDREQ

 

 

 

2 1

2 2

 

 

 

 

 

 

2

 

7

 

PDIOW#R

 

 

 

 

 

1 3

PDIOW#

 

 

 

2 3

2 4

 

 

 

 

 

 

3

 

6

 

PDIOR#R

 

 

 

 

 

1 3

PDIOR#

 

 

 

2 5

2 6

 

 

 

 

 

 

4

 

5

 

PDIORDYR

 

CSEL1

 

 

1 3

PDDACK#

 

 

2 7

2 8

 

 

 

 

 

 

 

PDDACK#R

 

 

 

 

 

 

 

 

 

 

 

 

2 9

3 0

 

 

 

 

 

 

 

 

 

 

RP55

3 3

PDIRQR

 

 

 

 

R 1 0 3

 

 

 

 

 

3 1

3 2

 

 

 

 

 

 

1 3

PDA1

 

1

8

PDA1R

 

 

 

 

4 7 0

 

 

 

3 3

3 4

 

 

 

 

 

 

 

2

7

PDA0R

PDA2R

 

 

 

 

 

 

1 3

PDA0

 

3 5

3 6

 

 

 

 

 

 

 

3

6

PDCS1#R

PDCS3#R

 

 

 

 

 

 

1 3

PDCS1#

 

3 7

3 8

 

 

 

 

 

 

 

4

5

IDERSTP#R

 

 

 

 

 

 

 

 

1 3

RSTDRV#

 

 

3 9

4 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HEADER 20X2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

V 5 _ 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R54

R55

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10k

10k

 

 

 

 

 

1

U22A

 

1 4

U25A

 

HD _ ACT2#

 

2

3

1

2

 

 

 

 

 

7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7 4 A L S 0 0

 

7 4 A C T 0 5

Secondary IDE Connector

D5 L G S 2 6 0 - D O

V 5 _ 0

R58

2 2 0

1

 

 

2

 

 

 

NC

IN

 

 

 

 

OUT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

 

 

 

 

 

 

 

 

 

 

HD Active LED

4

3

2

1

 

 

V 5 _ 0

 

 

 

R 1 0 2

R 1 0 1

 

 

 

1 K

1 K

 

 

 

 

RP57

4 7

PDIORDYR

1 3

PIORDY

1

8

2

7

PDIRQR

9,13,14,16,18

IRQ14

3

6

SDIORDYR

1 3

SIORDY

4

5

SDIRQR

9,13,14,16,18

IRQ15

 

 

 

 

 

RP54

3 3

PDA2R

1 3

PDA2

1

8

2

7

SDA2R

1 3

SDA2

3

6

PDCS3#R

1 3

PDCS3#

4

5

SDCS3#R

1 3

SDCS3#

 

 

 

1 3 SDD[15:0]

R96

8 .2K

1 3 SDREQ

1 3 SDIOW#

1 3 SDIOR#

1 3 SDDACK#

1 3 SDA1

1 3 SDA0

1 3 SDCS1#

 

 

 

 

 

IDERSTS#R

 

 

 

 

 

 

 

 

SDD7

 

 

RP46 3 3

 

JP3

 

 

 

 

 

 

 

 

 

1

8

1

2

RP45

3 3

 

 

 

 

SDD6

 

 

2

7

1

8

 

SDD8

 

 

 

 

3

4

 

 

 

SDD5

 

 

3

6

2

7

 

SDD9

 

 

 

 

5

6

 

 

 

SDD4

 

 

4

5

3

6

 

SDD10

 

 

 

 

7

8

 

 

 

 

 

 

 

 

4

5

 

SDD11

 

 

SDD3

 

 

 

 

9

1 0

 

 

 

 

1

8

 

 

RP42

3 3

 

 

 

 

 

1 1

1 2

 

 

 

 

SDD2

 

2

7

 

 

1

8

SDD12

 

 

 

 

1 3

1 4

 

 

 

SDD1

 

3

6

 

 

2

7

SDD13

 

 

 

 

1 5

1 6

 

 

 

SDD0

 

4

5

 

 

3

6

SDD14

 

 

 

 

1 7

1 8

 

RP41

3 3

 

RP43

3 3

 

 

4

5

SDD15

1

8

 

 

 

SDREQR

1 9

2 0

 

 

 

 

 

 

 

2 1

2 2

 

 

 

 

2

7

 

 

 

SDIOW#R

 

 

 

 

 

 

 

2 3

2 4

 

 

 

 

3

6

 

 

 

SDIOR#R

 

 

 

 

 

 

 

2 5

2 6

 

 

 

 

4

5

 

 

 

SDIORDYR

 

CSEL2

 

 

 

 

 

2 7

2 8

 

 

 

 

 

 

 

 

SDDACK#R

 

 

 

 

 

 

 

 

 

2 9

3 0

 

 

 

 

 

 

RP56

3 3

SDIRQR

 

 

 

R 1 0 4

 

 

3 1

3 2

 

 

 

 

 

1

 

8

SDA1R

 

 

 

4 7 0

 

 

 

3 3

3 4

 

 

 

 

 

2

 

7

SDA0R

SDA2R

 

 

 

 

 

 

3 5

3 6

 

 

 

 

 

3

 

6

SDCS1#R

SDCS3#R

 

 

 

 

 

 

3 7

3 8

 

 

 

RSTDRV#

4

 

5

IDERSTS#R

 

 

 

 

 

 

 

3 9

4 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HEADER 20X2

 

 

 

 

 

 

 

 

 

 

 

HD _ ACT2#

 

 

 

 

 

SDD7

R 1 2 4 10k

2

1

THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT

 

 

 

 

BEEN VERIFIED FOR MANUFACTURING AS AN ENDUSER

 

 

 

 

Title

 

 

 

PRODUCT. INTEL IS NOT RESPONSIBLE FORTHE

 

IDE Connectors

 

 

MISUSE OF THIS INFORMATIO.

Size

Document Number

 

Rev

C

{Doc}

 

D

 

 

 

 

 

 

Date:

Thursday, February 25, 1999

Sheet 1 5 of 2 2

 

A

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Page 79 Page 81
Image 80
Page 79 Page 81
Contents Celeron Processor Development Kit ManualCeleron Processor Development Kit Manual Contents Hardware Reference Figures TablesPage Content Overview Text ConventionsTechnical Support Electronic Support SystemsProduct Literature Telephone Technical SupportRelated Documents Processor Assembly Features OverviewBaseboard Features Included HardwareSoftware Key Features General Software, IncBefore You Begin VGA MonitorSetting up the Evaluation Board Evaluation Board Jumpers and ConnectorsGetting Started Configuring the Bios Page Block Diagram Evaluation Board Block Diagram2 82443BX Host Bridge/Controller System OperationCeleron Processor 3 ITP System Bus InterfacePower Boot ROM4 82371EB PCI to ISA/IDE Xcelerator PIIX4E DramPCI Connectors ISA ConnectorsAGP Connector IDE SupportPost Code Debugger Clock GenerationInterrupt Map InterruptsSize Description Memory MapMemory Map Page Processor Assembly Post Code DebuggerThermal Management ITP Debugger PortISA and PCI Expansion Slots PCI Device MappingPCI Device Mapping Device Address Line PCI Device NumberConnector Pinouts ATX Power ConnectorPrimary Power Connector J11 Pin Name FunctionITP Debugger Connector ITP Connector Pin Assignment J2 on the Processor AssemblyUSB Connector Pinout J2 Stacked USBMouse and Keyboard Connectors Keyboard and Mouse Connector Pinouts J1 on the BaseboardDB25 Parallel Port Connector Pinout J3 Pin Signal NameIDE Connector Serial Port Connector Pinout J4PCI IDE1 JP3 and IDE2 JP4 Connector Serial PortsFloppy Drive Connector Diskette Drive Header Connector JP1PCI Slot Connector 10. PCI Slots J7, J8, J9ISA Slot Connector 11. ISA Slots J5, J6Pin# AGP Connector12. AGP Slot J13 Enable Spread Spectrum Clocking J14 13. Default Jumper SettingsJumpers Clock Frequency Selection J15Flash Bios VPP Select J21 Flash Bios Boot Block Control J22Push Button Switches 6 SMI# Source Control J23In-Circuit Bios Update Page Bios and Pre-Boot Features Power-On Self-Test PostBios Post Pre-Boot Environment Setup Screen System Basic Cmos Configuration ScreenConfiguring Drive Assignments Embedded Bios Basic Setup ScreenFile System Name Controller Master/Slave Configuring IDE Drive TypesIDE0-IDE3 Drive Assignments Configuring Boot Actions Custom Configuration Setup ScreenShadow Configuration Setup Screen Embedded Bios Custom Setup ScreenStandard Diagnostics Routines Setup Screen Start System Bios Debugger Setup ScreenConsole Redirection Start RS232 Manufacturing Link Setup ScreenManufacturing Mode Integrated Bios Debugger CE-Ready Windows CE LoaderIntegrated Bios Debugger Running Over a Remote Terminal Embedded Bios Post Codes Poststatusvideorom Poststatusbeforesetup Embedded Bios Beep Codes PostbeeprefreshPage PLD Code Listing PLD Code Listing Table B-1. Baseboard Bill of Materials Sheet 1 Reference Description Manufacturer Manufacturer P/NBios Flash Intel Table B-1. Baseboard Bill of Materials Sheet 2Table B-1. Baseboard Bill of Materials Sheet 3 Reference Description ManufacturerTable B-1. Baseboard Bill of Materials Sheet 4 SOIC20,SO20WReference Descriptions Manufacturer Manufacturer P/N ECJ-1VB1C104KERJ-6GEYJ472V Schematics Evaluation Platform System Electronic s Board PCI BUS Mini PCI Connector This Drawing Contains Information Which has not Socket DIMM1 DIMM2 This Drawing Contains Information Which has not This Drawing Contains Information Which Hasnot PCI Slot PCI Slot Been Verified for Manufacturing AS AN END Seru Title Been Verified for Manufacturing AS AN Enduser Title USB Secondary IDE Connector ISA/Host USB Connectors ISA Slots COM0/COM1 Port Speaker Header Unused Gates CeleronTM Processor Ppga Daughter Board ITP Pin Socket PRODUCT. Intel is not Responsible for GTL+ Termination RESISTORS-BX GTL+ Termination RESISTORS-CPU 82443BX BX Strapping Options Mounting Holes Thermal Sensor TIE Directly to Ground Plane Index Index-2
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