Intel 273246-002 manual Content Overview, Text Conventions

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About This Manual

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This manual tells you how to set up and use the evaluation board and processor assembly included in your Celeron™ Processor Development Kit.

1.1Content Overview

Chapter 1, “About This Manual” - This chapter contains a description of conventions used in this manual. The last few sections tell you how to obtain literature and contact customer support.

Chapter 2, “Getting Started” - Provides complete instructions on how to configure the evaluation board and processor assembly by setting jumpers, connecting peripherals, providing power, and configuring the BIOS.

Chapter 3, “Theory of Operation” - This chapter provides information on the system design.

Chapter 4, “Hardware Reference” - This chapter provides a description of jumper settings and functions, and pinout information for each connector.

Chapter 5, “BIOS Quick Reference” - This chapter describes how to configure the BIOS for your system configuration. A summary of all BIOS menu options is provided.

Appendix A, “PLD Code Listing” - This appendix includes a sample code listing for the Post Code Debugger.

Appendix B, “Bill of Materials” - This appendix contains the bill of materials for the evaluation board.

Appendix C, “Schematics” - This appendix contains schematics for selected connectors and subsystems for the evaluation board.

1.2Text Conventions

The following notations may be used throughout this manual.

#

The pound symbol (#) appended to a signal name indicates that the

 

signal is active low.

Variables

Variables are shown in italics. Variables must be replaced with correct

 

values.

Instructions

Instruction mnemonics are shown in uppercase. When you are

 

programming, instructions are not case-sensitive. You may use either

 

upper- or lowercase.

Celeron™ Processor Development Kit Manual

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Contents Development Kit Manual Celeron ProcessorCeleron Processor Development Kit Manual Contents Hardware Reference Tables FiguresPage Text Conventions Content OverviewElectronic Support Systems Technical SupportTelephone Technical Support Product LiteratureRelated Documents Overview Processor Assembly FeaturesIncluded Hardware Baseboard FeaturesGeneral Software, Inc Software Key FeaturesVGA Monitor Before You BeginEvaluation Board Jumpers and Connectors Setting up the Evaluation BoardGetting Started Configuring the Bios Page Evaluation Board Block Diagram Block DiagramCeleron Processor System Operation2 82443BX Host Bridge/Controller System Bus Interface 3 ITPDram PowerBoot ROM 4 82371EB PCI to ISA/IDE Xcelerator PIIX4EIDE Support PCI ConnectorsISA Connectors AGP ConnectorInterrupts Post Code DebuggerClock Generation Interrupt MapMemory Map Memory MapSize Description Page ITP Debugger Port Processor AssemblyPost Code Debugger Thermal ManagementDevice Address Line PCI Device Number ISA and PCI Expansion SlotsPCI Device Mapping PCI Device MappingPin Name Function Connector PinoutsATX Power Connector Primary Power Connector J11Stacked USB ITP Debugger ConnectorITP Connector Pin Assignment J2 on the Processor Assembly USB Connector Pinout J2Pin Signal Name Mouse and Keyboard ConnectorsKeyboard and Mouse Connector Pinouts J1 on the Baseboard DB25 Parallel Port Connector Pinout J3Serial Ports IDE ConnectorSerial Port Connector Pinout J4 PCI IDE1 JP3 and IDE2 JP4 ConnectorDiskette Drive Header Connector JP1 Floppy Drive Connector10. PCI Slots J7, J8, J9 PCI Slot Connector11. ISA Slots J5, J6 ISA Slot Connector12. AGP Slot J13 AGP ConnectorPin# Clock Frequency Selection J15 Enable Spread Spectrum Clocking J1413. Default Jumper Settings Jumpers6 SMI# Source Control J23 Flash Bios VPP Select J21Flash Bios Boot Block Control J22 Push Button SwitchesIn-Circuit Bios Update Page Power-On Self-Test Post Bios and Pre-Boot FeaturesBios Post Pre-Boot Environment Basic Cmos Configuration Screen Setup Screen SystemEmbedded Bios Basic Setup Screen Configuring Drive AssignmentsIDE0-IDE3 Drive Assignments Configuring IDE Drive TypesFile System Name Controller Master/Slave Custom Configuration Setup Screen Configuring Boot ActionsEmbedded Bios Custom Setup Screen Shadow Configuration Setup ScreenStart System Bios Debugger Setup Screen Standard Diagnostics Routines Setup ScreenManufacturing Mode Start RS232 Manufacturing Link Setup ScreenConsole Redirection CE-Ready Windows CE Loader Integrated Bios DebuggerIntegrated Bios Debugger Running Over a Remote Terminal Embedded Bios Post Codes Poststatusvideorom Poststatusbeforesetup Postbeeprefresh Embedded Bios Beep CodesPage PLD Code Listing PLD Code Listing Reference Description Manufacturer Manufacturer P/N Table B-1. Baseboard Bill of Materials Sheet 1Table B-1. Baseboard Bill of Materials Sheet 2 Bios Flash IntelReference Description Manufacturer Table B-1. Baseboard Bill of Materials Sheet 3SOIC20,SO20W Table B-1. Baseboard Bill of Materials Sheet 4ECJ-1VB1C104K Reference Descriptions Manufacturer Manufacturer P/NERJ-6GEYJ472V Schematics Evaluation Platform System Electronic s Board PCI BUS Mini PCI Connector This Drawing Contains Information Which has not Socket DIMM1 DIMM2 This Drawing Contains Information Which has not This Drawing Contains Information Which Hasnot PCI Slot PCI Slot Been Verified for Manufacturing AS AN END Seru Title Been Verified for Manufacturing AS AN Enduser Title USB Secondary IDE Connector ISA/Host USB Connectors ISA Slots COM0/COM1 Port Speaker Header Unused Gates CeleronTM Processor Ppga Daughter Board ITP Pin Socket PRODUCT. Intel is not Responsible for GTL+ Termination RESISTORS-BX GTL+ Termination RESISTORS-CPU 82443BX BX Strapping Options Mounting Holes Thermal Sensor TIE Directly to Ground Plane Index Index-2