Intel 273246-002 manual PCI Slot

4

A B C D E

4

3

2

V 5 _ 0

V 3 _ 3

C57

C87

C75

C 1 1 8

C68

C 1 1 5

C 1 2 1

C 1 0 8

C92

1 0 u F

0 . 1uF

0 . 1uF

0 . 1uF

0 . 01uF

0 . 01uF

1 0 u F

0 . 1uF

0 . 1uF

3,4,10,13

AD[31:0]

AD[31:0]

3,4,10,13

-C/BE[3:0]

-C/BE[3:0]

J9

B 1

- 12V

T R S T

A 1

PCI _ TRST

1 0

PCI_TDI

1 0 PCI _ TCLK

B 2

A 2

T C K

+ 1 2 V

B 3

A 3

PCI _ TMS

1 0

GND

T M S

B 4

A 4

T D O

TDI

PCI_TDI

1 0

B 5

A 5

V 5 _ 0

V 5 _ 0

B 6

A 6

PIRQC#

3,9,10,12,13,14

V 5 _ 0

INTA

B 7

A 7

3,9,10,13,14

PIRQD#

INTB

INTC

PIRQA#

3,9,10,13,14

B 8

A 8

3,9,10,12,13,14

PIRQB#

INTD

V 5 _ 0

B 9

A 9

PRSNT1

NC

B 1 0

A 1 0

NC

V 5 _ 0

B 1 1

A 1 1

PRSNT2

NC

B 1 2

A 1 2

C79

C82

GND

GND

B 1 3

A 1 3

GND

GND

0 . 01uF

0 . 01uF

B 1 4

A 1 4

B 1 5

NC

NC

A 1 5

-PCIRST

3,4,10,12,13

GND

R S T

B 1 6

A 1 6

8

PCICLK3

CLK

V 5 _ 0

B 1 7

A 1 7

- P G N T 2

4,9

GND

G N T

B 1 8

A 1 8

4,9,13

- PREQ2

R E Q

GND

B 1 9

A 1 9

AD31

V 5 _ 0

NC

AD30

AD30

B 2 0

A 2 0

AD[31]

AD[30]

AD29

B 2 1

A 2 1

AD[29]

V 3 _ 3

AD28

B 2 2

A 2 2

GND

AD[28]

AD27

B 2 3

A 2 3

AD26

R14

AD[27]

AD[26]

AD25

B 2 4

A 2 4

2 2 0

-C/BE3

AD[25]

GND

AD24

B 2 5

A 2 5

V 3 _ 3

AD[24]

PCIC2

B 2 6

A 2 6

AD23

C/BE3

IDSEL

B 2 7

A 2 7

AD[23]

V 3 _ 3

AD22

B 2 8

A 2 8

GND

AD[22]

AD21

B 2 9

A 2 9

AD20

AD[21]

AD[20]

AD19

B 3 0

A 3 0

AD[19]

GND

AD18

B 3 1

A 3 1

V 3 _ 3

AD[18]

AD17

B 3 2

A 3 2

AD16

-C/BE2

AD[17]

AD[16]

B 3 3

A 3 3

C/BE2

V 3 _ 3

B 3 4

A 3 4

- FRAME

3,4,9,10,13

GND

FRAME

B 3 5

A 3 5

3,4,9,10,13

-IRDY

IRDY

GND

B 3 6

A 3 6

- TRDY

3,4,9,10,13

V 3 _ 3

TRDY

B 3 7

A 3 7

3,4,9,10,13

- DEVSEL

DEVSEL

GND

B 3 8

A 3 8

- S T O P

3,4,9,10,13

GND

S T O P

B 3 9

A 3 9

3,4,9,10

- PLOCK

L O C K

V 3 _ 3

B 4 0

A 4 0

SDONE

9,10

3,9,10

- PERR

PERR

SDONE

B 4 1

A 4 1

3,4,9,10,13

- SERR

V 3 _ 3

S B O

- S B O

9,10

B 4 2

A 4 2

-C/BE1

SERR

GND

PAR

3,4,9,10,13

B 4 3

A 4 3

V 3 _ 3

PAR

AD15

B 4 4

A 4 4

AD14

C/BE1

AD[15]

B 4 5

A 4 5

AD[14]

V 3 _ 3

AD13

B 4 6

A 4 6

GND

AD[13]

AD12

B 4 7

A 4 7

AD11

AD[12]

AD[11]

AD10

B 4 8

A 4 8

AD[10]

GND

AD9

B 4 9

A 4 9

GND

AD[09]

AD8

B 5 2

AD[08]

C/BE0

A 5 2

AD7

B 5 3

A 5 3

AD[07]

V 3 _ 3

AD6

B 5 4

A 5 4

V 3 _ 3

AD[06]

AD5

B 5 5

A 5 5

AD4

AD3

B 5 6

AD[05]

AD[04]

A 5 6

AD[03]

GND

AD2

B 5 7

A 5 7

GND

AD[02]

AD1

B 5 8

A 5 8

AD0

AD[01]

AD[00]

B 5 9

A 5 9

V 5 _ 0

V 5 _ 0

9,10 ACK64#

B 6 0

A 6 0

R E Q 6 4 #

9,10

ACK64

R E Q 6 4

B 6 1

A 6 1

V 5 _ 0

V 5 _ 0

B 6 2

A 6 2

V 5 _ 0

V 5 _ 0

-C/BE0

PCI Conn

V 5 _ 0

R69		R68		R67
4 .7K		4 .7K		4 .7K
	PCI _ TMS		PCI _ TCLK

PCI _ TRST

R66

4 .7K

3

2

1

PCI SLOT 2

THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT
BEEN VERIFIED FOR MANUFACTURING AS AN ENDUSER
	Title
PRODUCT. INTEL IS NOT RESPONSIBLE FORTHE		PCI Slot 2
MISUSE OF THIS INFORMATIO.	Size	Document Number		Rev
	C	{Doc}		D
	Date:	Thursday, February 25, 1999	Sheet 1 1 of 2 2

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