Intel 273246-002 manual PLD Code Listing

Page 57

PLD Code Listing

A

The code listing below is for the 22V10 PLD.

TITLE

22V10 PORT 80 ADDRESS DECODER / FLASH DECODE

PATTERN

1

REVISION

B

AUTHOR

CHRIS BANYAI

COMPANY

INTEL CORPORATION

DATE

10/1/97

OPTIONS

SECURITY = OFF

;( part was 22V10FN before conversion ) CHIP P80B iPLD22V10N

PIN

19

IOWR_BAR

PIN

3

AEN

PIN

[6:7]

SA[0:1]

PIN

[9:13]

SA[2:6]

PIN

16

SA7

PIN

[5:4]

SA[8:9]

PIN

[26:23]

SA[19:16]

PIN

[21:20]

SA[15:14]

PIN

2

SEL

PIN

18

/CS_BAR

PIN

17

/CS_DOC

PIN

27

OX

EQUATIONS

CS_BAR = /IOWR_BAR * /AEN * /SA0 * /SA1 * /SA2 * /SA3 * /SA4 * /SA5 * /SA6

*SA7 * /SA8 * /SA9

CS_BAR.TRST = VCC

CS_DOC = /SEL * /AEN * SA19 * SA18 * /SA17 * /SA16 * SA15 * /SA14

+SEL * /AEN * SA19 * SA18 * /SA17 * SA16 * /SA15 * /SA14 CS_DOC.TRST = VCC

OX = /IOWR_BAR

OX.TRST = VCC

SIMULATION

SETF /AEN /SA0 /SA1 /SA2 /SA3 /SA4 /SA5 /SA6 /SA7 /SA8 /SA9 IOWR_BAR

SETF SA7 IOWR_BAR

SETF /IOWR_BAR

SETF IOWR_BAR

Celeron™ Processor Development Kit Manual

A-1

Image 57
Contents Development Kit Manual Celeron ProcessorCeleron Processor Development Kit Manual Contents Hardware Reference Tables FiguresPage Text Conventions Content OverviewElectronic Support Systems Technical SupportTelephone Technical Support Product LiteratureRelated Documents Overview Processor Assembly FeaturesIncluded Hardware Baseboard FeaturesGeneral Software, Inc Software Key FeaturesVGA Monitor Before You BeginEvaluation Board Jumpers and Connectors Setting up the Evaluation BoardGetting Started Configuring the Bios Page Evaluation Board Block Diagram Block DiagramSystem Operation Celeron Processor2 82443BX Host Bridge/Controller System Bus Interface 3 ITPBoot ROM Power4 82371EB PCI to ISA/IDE Xcelerator PIIX4E DramISA Connectors PCI ConnectorsAGP Connector IDE SupportClock Generation Post Code DebuggerInterrupt Map InterruptsMemory Map Memory MapSize Description Page Post Code Debugger Processor AssemblyThermal Management ITP Debugger PortPCI Device Mapping ISA and PCI Expansion SlotsPCI Device Mapping Device Address Line PCI Device NumberATX Power Connector Connector PinoutsPrimary Power Connector J11 Pin Name FunctionITP Connector Pin Assignment J2 on the Processor Assembly ITP Debugger ConnectorUSB Connector Pinout J2 Stacked USBKeyboard and Mouse Connector Pinouts J1 on the Baseboard Mouse and Keyboard ConnectorsDB25 Parallel Port Connector Pinout J3 Pin Signal NameSerial Port Connector Pinout J4 IDE ConnectorPCI IDE1 JP3 and IDE2 JP4 Connector Serial PortsDiskette Drive Header Connector JP1 Floppy Drive Connector10. PCI Slots J7, J8, J9 PCI Slot Connector11. ISA Slots J5, J6 ISA Slot ConnectorAGP Connector 12. AGP Slot J13Pin# 13. Default Jumper Settings Enable Spread Spectrum Clocking J14Jumpers Clock Frequency Selection J15Flash Bios Boot Block Control J22 Flash Bios VPP Select J21Push Button Switches 6 SMI# Source Control J23In-Circuit Bios Update Page Power-On Self-Test Post Bios and Pre-Boot FeaturesBios Post Pre-Boot Environment Basic Cmos Configuration Screen Setup Screen SystemEmbedded Bios Basic Setup Screen Configuring Drive AssignmentsConfiguring IDE Drive Types IDE0-IDE3 Drive AssignmentsFile System Name Controller Master/Slave Custom Configuration Setup Screen Configuring Boot ActionsEmbedded Bios Custom Setup Screen Shadow Configuration Setup ScreenStart System Bios Debugger Setup Screen Standard Diagnostics Routines Setup ScreenStart RS232 Manufacturing Link Setup Screen Manufacturing ModeConsole Redirection CE-Ready Windows CE Loader Integrated Bios DebuggerIntegrated Bios Debugger Running Over a Remote Terminal Embedded Bios Post Codes Poststatusvideorom Poststatusbeforesetup Postbeeprefresh Embedded Bios Beep CodesPage PLD Code Listing PLD Code Listing Reference Description Manufacturer Manufacturer P/N Table B-1. Baseboard Bill of Materials Sheet 1Table B-1. Baseboard Bill of Materials Sheet 2 Bios Flash IntelReference Description Manufacturer Table B-1. Baseboard Bill of Materials Sheet 3SOIC20,SO20W Table B-1. Baseboard Bill of Materials Sheet 4ECJ-1VB1C104K Reference Descriptions Manufacturer Manufacturer P/NERJ-6GEYJ472V Schematics Evaluation Platform System Electronic s Board PCI BUS Mini PCI Connector This Drawing Contains Information Which has not Socket DIMM1 DIMM2 This Drawing Contains Information Which has not This Drawing Contains Information Which Hasnot PCI Slot PCI Slot Been Verified for Manufacturing AS AN END Seru Title Been Verified for Manufacturing AS AN Enduser Title USB Secondary IDE Connector ISA/Host USB Connectors ISA Slots COM0/COM1 Port Speaker Header Unused Gates CeleronTM Processor Ppga Daughter Board ITP Pin Socket PRODUCT. Intel is not Responsible for GTL+ Termination RESISTORS-BX GTL+ Termination RESISTORS-CPU 82443BX BX Strapping Options Mounting Holes Thermal Sensor TIE Directly to Ground Plane Index Index-2