Texas Instruments TCM4300 manual ±2. RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5

Page 37

Table 4±2. RXIP, RXIN, RXQP, and RXQN Inputs (AVDD = 3 V, 4.5 V, 5 V)

PARAMETER

 

TEST CONDITIONS

MIN

TYP

MAX

UNIT

 

 

 

 

 

 

 

Input voltage range

 

 

0.3

 

AVDD± 0.3

V

Input voltage for full- scale

Differential

 

 

0.5

 

Vp-p

digital output

Single ended

 

 

0.5

 

 

 

 

 

 

 

 

 

 

 

 

Nominal operating level

Differential

 

 

0.125

 

Vp-p²

 

 

 

 

 

Single ended

 

 

0.125

 

 

 

 

 

 

 

 

 

 

 

 

 

Input CMRR (RXI, RXQ)

 

 

45

 

 

dB

 

 

 

 

 

 

Sampling frequency, SINT (digital mode)

 

 

48.6

 

kHz

 

 

 

 

 

 

Sampling frequency, SINT (analog mode)

 

 

40

 

kHz

 

 

 

 

 

 

Receive error vector magnitude (EVM)

 

 

5%

6%

 

 

 

 

 

 

 

 

I/Q sample timing skew

 

Input signal 0 ± 15 kHz

 

50

 

ns

 

 

 

 

 

 

 

A / D resolution

 

 

 

10

 

Bits

 

 

 

 

 

 

 

Signal to noise-plus distortion

 

Input at full scale ± 1 dB

54

58

 

dB

 

 

 

 

 

 

 

Integral nonlinearity

 

0 dB to ± 60 dB input

 

1

 

LSB

 

 

 

 

 

 

 

Gain error (I or Q channel)

 

 

 

 

± 7%

 

 

 

 

 

 

 

Gain mismatch between I and Q

 

 

 

± 0.3

dB

 

 

 

 

 

 

 

Differential dc offset voltage

 

 

 

 

± 30

mV

 

 

 

 

 

 

FM input sensitivity, for full scale (± 14 kHz

 

 

2.5

 

Vp-p

deviation)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FM input dc offset (wrt VHR)

 

 

 

 

± 80

mV

 

 

 

 

 

 

FM input idle channel noise, below full scale

 

 

 

± 50

dB

input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FM gain error

 

 

 

 

± 6%

 

 

 

 

 

 

 

 

Power supply rejection

 

f = 0 kHz to 15 kHz

 

40

 

dB

 

 

 

 

 

 

 

²Provides 12 dB headroom for AGC fading conditions.

It is recommended that the single-ended output of an external FM discriminator be capacitively coupled to the FM terminal for analog mode voice and WBD reception. An external bias resistor is needed to bias the FM terminal to VHR. The signal at this terminal is conveyed to the Q side of the receiver using the multiplexer, and the other Q input is connected internally to the VHR reference voltage. The I input of the receive section circuitry is disabled in the analog mode. The FM signal passes through the antialiasing filter, as specified in Table 4±3, before passing through the A/D converter. The signal at the FM terminal is also routed directly to the WBD demodulator through a low-pass filter (LPF) with the ±3 dB point at 270 kHz.

4±2

Image 37
Contents Data Manual SLWS010F TCM4300 Data Manual Important Notice Contents Mechanical Data ±1 List of Illustrations List of Tables Introduction FeaturesTCM4300 Functional Block Diagram PZ Package TOP View Pin AssignmentsVSS FmrxenTerminal Description Name Terminal FunctionsDspstrbl DsprwDvdd DvssMTS1 McdsMclkin McrwSint ScenSynclk SyndtaDissipation Rating Table Power Rating Above TA = 25CPackage Derating FactorReference Characteristics Power ConsumptionRecommended Operating Conditions RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Terminal ImpedanceFunction MIN TYP² MAX Unit Parameter Test Conditions MIN TYP MAX UnitAuxiliary D/A Converters Transmit I and Q Channel OutputsParameter MIN TYP MAX Unit Auxiliary D/A Converters Slope AGC, AFC, Pwrcont RSSI/Battery A/D ConverterAuxiliary D/A Converters Slope Lcdcontr Nominal LSB Nominal Output VoltageTransmit TX Channel Frequency Response Digital Mode Transmit TX Channel Frequency Response Analog Mode Page Mclkout Mclkout Timing Requirements see ±1 and NoteVOH VOL Mcds Parameter Alternate MIN MAX UnitMcrw MCA4±MCA0 MCD7±MCD0 Mccsh MccslMCA4±MCA0 Parameter Alternate MIN MAX Unit SymbolMCA4±MCA0 MCD7±MCD0 Twdho MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl Motorola 16-Bit Read Cycle, MTS 10 =MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl Mcrw MCA0±MCA410% ThR / W ThWA Dspstrbl DspcslDsprw Dspa Dspd±11. TCM4300 to DSP Interface Write Cycle ±12 Control Signal Analog Mode Digital Mode ±1. TCM4300 Receive Channel Control SignalsMode Fmvox Iqrxen Fmrxen Data Transfer±2. RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Transmit Section ±5. Transmit TX I and Q Channel Outputs Modulation error percentage +100 s %±6. Transmit TX Channel Frequency Response Digital Mode Transmit Burst Operation Digital Mode±7. Transmit TX Channel Frequency Response Analog Mode ±1. Power Ramp-Up/Ramp-Down TIming Diagram Wide-Band Data Demodulator Transmit I And Q Output LevelWide-band Data Interrupts ±8. Typical Bit-Error-Rate Performance Wbdbw =±9. Bits in Control Register WBDCtrl Parameter Test Conditions MIN MAX Unit Mean CNRWBD Wide-band Data Demodulator General Information±10. Auxiliary D/A Converters Auxiliary DACs, LCD Contrast Converter±11. Auxiliary D /A Converters Slope AGC, AFC, Pwrcont ±13. RSSI/Battery A/D Converter RSSI, Battery MonitorTiming And Clock Generation ±12. Auxiliary D /A Converters Slope LcdcontrSpeech-Codec Clock Generation Clock GenerationMicrocontroller Clock Sample Interrupt SintPhase-Adjustment Strategy Mclkin RCOMclken Frequency Synthesizer Interface Highval Clkpol Numclks LowvalMSB/LSB First SyndtaName Description ±14. Synthesizer Control Fields15. External Power Control Signals Power Control PortName Suggested External Application Reset Synclk Syndta SYNLE1 SYNLE0 SynrdyWBD Wbdon Iqrxen Txen ModeOUT1 Fmrxen ScenDint Microcontroller-DSP CommunicationsFifo a Fifo B Cint DSP±16. Microcontroller Register Map Microcontroller Register Map±17. Microcontroller Register Definitions Wide-Band Data/Control RegisterAddr Name Category Microcontroller Status and Control Registers BIT Name Function Reset Value±18. WBDCtrl Register ±19. MStatCtrl Register Bits LCD ContrastLDC D/A Lcden±20. DSP Register Map DSP Register Map±21. DSP Register Definitions Base Station Offset Register Wide-Band Data RegistersDspcsl TCM4300 Dsprw Dspstrbl Sint Cint Bdint DSP Strb INT±22. DStatCtrl Register Bits DSP Status and Control RegistersPower-On Reset ResetInternal Reset State ±23. Power-On Reset Register Initialization±24. Microcontroller Interface Configuration Intel Microcontroller Mode Of Operation±25. Microcontroller Interface Connections for Intel Mode Microcontroller InterfaceMotorola Microcontroller Mode of Operation Mitsubishi Microcontroller Mode of OperationMcrw Mcds IRQ NMI DintCS3 ±32 PZ S-PQFP-G100 Mechanical DataImportant Notice