Texas Instruments TCM4300 Wide-Band Data Registers, Base Station Offset Register, DSP Strb INT

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DSPD[9:0]

DSPA[3:0]

DSPCSL

TCM4300 DSPRW

DSPSTRBL

SINT

CINT

BDINT

10

4

D[15:6]

A[3:0]

IS

R/W DSP

STRB

INT 1

INT 3

INT 4

Figure 4±11. DSP Interface

4.20 Wide-Band Data Registers

Bit 9 of the wide-band data register is the most recently received bit as shown below.

	9 ± 2	1 ± 0
WBD
WBD	WB Data	Reserved

	R

WBDCtrl

9	8	7 ± 5	4 ± 0

WBD_LCKD	WBD_ON	WBD_BW	Reserved

	R/W

4.21 Base Station Offset Register

BST OFFSET values are 00, 01, 10, and 11, which correspond to an offset value d of 0, 1, 2, and 3 respectively as shown below.

	9 ± 2	1 ± 0
BST OFFSET
BST OFFSET	Reserved	Offset[1:0]

		W

The delay in the TCM4300 TX channels is increased by the amount:

	BST OFFSET + d	TSINT
	BST OFFSET + d	4
		4

4±26

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Contents Data Manual SLWS010F TCM4300 Data Manual Important Notice Contents Mechanical Data ±1 List of Illustrations List of Tables Introduction FeaturesTCM4300 Functional Block Diagram PZ Package TOP View Pin AssignmentsVSS FmrxenTerminal Description Name Terminal FunctionsDspstrbl DsprwDvdd DvssMTS1 McdsMclkin McrwSint ScenSynclk SyndtaDissipation Rating Table Power Rating Above TA = 25CPackage Derating FactorReference Characteristics Power ConsumptionRecommended Operating Conditions RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Terminal ImpedanceFunction MIN TYP² MAX Unit Parameter Test Conditions MIN TYP MAX UnitAuxiliary D/A Converters Transmit I and Q Channel OutputsParameter MIN TYP MAX Unit Auxiliary D/A Converters Slope AGC, AFC, Pwrcont RSSI/Battery A/D ConverterAuxiliary D/A Converters Slope Lcdcontr Nominal LSB Nominal Output VoltageTransmit TX Channel Frequency Response Digital Mode Transmit TX Channel Frequency Response Analog Mode Page Mclkout Mclkout Timing Requirements see ±1 and NoteVOH VOL Mcds Parameter Alternate MIN MAX UnitMcrw MCA4±MCA0 MCD7±MCD0 Mccsh MccslMCA4±MCA0 Parameter Alternate MIN MAX Unit SymbolMCA4±MCA0 MCD7±MCD0 Twdho MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl Motorola 16-Bit Read Cycle, MTS 10 =MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl Mcrw MCA0±MCA410% ThR / W ThWA Dspstrbl DspcslDsprw Dspa Dspd±11. TCM4300 to DSP Interface Write Cycle ±12 Control Signal Analog Mode Digital Mode ±1. TCM4300 Receive Channel Control SignalsMode Fmvox Iqrxen Fmrxen Data Transfer±2. RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Transmit Section ±5. Transmit TX I and Q Channel Outputs Modulation error percentage +100 s %±6. Transmit TX Channel Frequency Response Digital Mode Transmit Burst Operation Digital Mode±7. Transmit TX Channel Frequency Response Analog Mode ±1. Power Ramp-Up/Ramp-Down TIming Diagram Wide-Band Data Demodulator Transmit I And Q Output LevelWide-band Data Interrupts ±8. Typical Bit-Error-Rate Performance Wbdbw =±9. Bits in Control Register WBDCtrl Parameter Test Conditions MIN MAX Unit Mean CNRWBD Wide-band Data Demodulator General Information±10. Auxiliary D/A Converters Auxiliary DACs, LCD Contrast Converter±11. Auxiliary D /A Converters Slope AGC, AFC, Pwrcont ±13. RSSI/Battery A/D Converter RSSI, Battery MonitorTiming And Clock Generation ±12. Auxiliary D /A Converters Slope LcdcontrSpeech-Codec Clock Generation Clock GenerationMicrocontroller Clock Sample Interrupt SintPhase-Adjustment Strategy Mclkin RCOMclken Frequency Synthesizer Interface Highval Clkpol Numclks LowvalMSB/LSB First SyndtaName Description ±14. Synthesizer Control Fields15. External Power Control Signals Power Control PortName Suggested External Application Reset Synclk Syndta SYNLE1 SYNLE0 SynrdyWBD Wbdon Iqrxen Txen ModeOUT1 Fmrxen ScenDint Microcontroller-DSP CommunicationsFifo a Fifo B Cint DSP±16. Microcontroller Register Map Microcontroller Register Map±17. Microcontroller Register Definitions Wide-Band Data/Control RegisterAddr Name Category Microcontroller Status and Control Registers BIT Name Function Reset Value±18. WBDCtrl Register ±19. MStatCtrl Register Bits LCD ContrastLDC D/A Lcden±20. DSP Register Map DSP Register Map±21. DSP Register Definitions Base Station Offset Register Wide-Band Data RegistersDspcsl TCM4300 Dsprw Dspstrbl Sint Cint Bdint DSP Strb INT±22. DStatCtrl Register Bits DSP Status and Control RegistersPower-On Reset ResetInternal Reset State ±23. Power-On Reset Register Initialization±24. Microcontroller Interface Configuration Intel Microcontroller Mode Of Operation±25. Microcontroller Interface Connections for Intel Mode Microcontroller InterfaceMotorola Microcontroller Mode of Operation Mitsubishi Microcontroller Mode of OperationMcrw Mcds IRQ NMI DintCS3 ±32 PZ S-PQFP-G100 Mechanical DataImportant Notice