Texas Instruments TCM4300 manual ±16. Microcontroller Register Map

Page 56

4.15 Microcontroller Register Map

The microcontroller can access 17 locations within the TCM4300. The register locations are 8 bits wide as shown in Table 4±16 and Table 4±17.

Table 4±16. Microcontroller Register Map

ADDR

NAME

D7

D6

D5

D4

D3

D2

D1

D0

 

 

 

 

 

 

 

 

 

 

00h

WBDCtrl

WBD_LCKD

WBD_ON

 

WBD_BW

 

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

00h

WBD

MSB

 

 

 

 

 

 

LSB

 

 

 

 

 

 

01h

FIFO

MSB

FIFO A(B) Microcontroller to DSP (DSP to microcontroller)

LSB

 

 

 

 

 

 

 

 

 

 

02h

MIntCtrl

Clear WBD

Clear-F

Clear-D

Send-C

AGCEN

AFCEN

FMRXEN

Reserved

 

 

 

 

 

 

 

 

 

 

03h

SynData0

MSB

 

 

 

 

 

 

LSB

 

 

 

 

 

 

 

 

 

 

04h

SynData1

MSB

 

 

 

 

 

 

LSB

 

 

 

 

 

 

 

 

 

 

05h

SynData2

MSB

 

 

 

 

 

 

LSB

 

 

 

 

 

 

 

 

 

 

06h

SynData3

MSB

 

 

 

 

 

 

LSB

 

 

 

 

 

 

 

 

 

 

07h

SynCtrl0

 

SEL[2:0]

 

 

 

LOWVAL

 

 

 

 

 

 

 

 

 

 

 

 

08h

SynCtrl1

Reserved

MSB/LSB

 

 

HIGHVAL

 

 

FIRST

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

09h

SynCtrl2

Reserved

CLKPOL

 

 

NUMCLKS

 

 

 

 

 

 

 

 

 

 

 

0Ah

MCClock

Reserved

MSB

 

 

 

 

LSB

 

 

 

 

 

 

 

 

 

 

0Bh

RSSI A/D

MSB

 

 

 

 

 

 

LSB

 

 

 

 

 

 

 

 

 

 

0Ch

BAT A/D

MSB

 

 

 

 

 

 

LSB

 

 

 

 

 

 

 

 

 

 

0Dh

LCD D/A

MSB

 

 

LSD

 

Reserved

 

LCDEN

 

 

 

 

 

 

 

 

 

 

0Eh

MStatCtrl

SYNOL

TXONIND

SYNRDY

MCLKEN

CVRDY

AuxFS1

AuxFS0

MPAEN

 

 

 

 

 

 

 

 

 

 

0Fh

TXI Offset

Reserved

Sign

MSB

 

 

 

LSB

 

 

 

 

 

 

 

 

 

10h

TXQ Offset

Reserved

Sign

MSB

 

 

 

LSB

 

 

 

 

 

 

 

 

 

 

4±21

Image 56
Contents Data Manual SLWS010F TCM4300 Data Manual Important Notice Contents Mechanical Data ±1 List of Illustrations List of Tables Features IntroductionTCM4300 Functional Block Diagram Pin Assignments PZ Package TOP ViewVSS FmrxenTerminal Functions Terminal Description NameDsprw DspstrblDvdd DvssMcds MTS1Mclkin McrwScen SintSynclk SyndtaPower Rating Above TA = 25C Dissipation Rating TablePackage Derating FactorRecommended Operating Conditions Power ConsumptionReference Characteristics Terminal Impedance RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5Function MIN TYP² MAX Unit Parameter Test Conditions MIN TYP MAX UnitParameter MIN TYP MAX Unit Transmit I and Q Channel OutputsAuxiliary D/A Converters RSSI/Battery A/D Converter Auxiliary D/A Converters Slope AGC, AFC, PwrcontAuxiliary D/A Converters Slope Lcdcontr Nominal LSB Nominal Output VoltageTransmit TX Channel Frequency Response Digital Mode Transmit TX Channel Frequency Response Analog Mode Page VOH VOL Mclkout Timing Requirements see ±1 and NoteMclkout Parameter Alternate MIN MAX Unit McdsMcrw MCA4±MCA0 MCD7±MCD0 Mccsh MccslParameter Alternate MIN MAX Unit Symbol MCA4±MCA0MCA4±MCA0 MCD7±MCD0 Twdho Motorola 16-Bit Read Cycle, MTS 10 = MCA0±MCA4 MCD0±MCD7 Mccsh MccslMCA0±MCA4 Mcrw MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl10% ThR / W ThWA Dspcsl DspstrblDsprw Dspa Dspd±11. TCM4300 to DSP Interface Write Cycle ±12 ±1. TCM4300 Receive Channel Control Signals Control Signal Analog Mode Digital ModeMode Fmvox Iqrxen Fmrxen Data Transfer±2. RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Transmit Section Modulation error percentage +100 s % ±5. Transmit TX I and Q Channel Outputs±7. Transmit TX Channel Frequency Response Analog Mode Transmit Burst Operation Digital Mode±6. Transmit TX Channel Frequency Response Digital Mode ±1. Power Ramp-Up/Ramp-Down TIming Diagram Transmit I And Q Output Level Wide-Band Data Demodulator±8. Typical Bit-Error-Rate Performance Wbdbw = Wide-band Data Interrupts±9. Bits in Control Register WBDCtrl Parameter Test Conditions MIN MAX Unit Mean CNRWide-band Data Demodulator General Information WBD±11. Auxiliary D /A Converters Slope AGC, AFC, Pwrcont Auxiliary DACs, LCD Contrast Converter±10. Auxiliary D/A Converters RSSI, Battery Monitor ±13. RSSI/Battery A/D ConverterTiming And Clock Generation ±12. Auxiliary D /A Converters Slope LcdcontrClock Generation Speech-Codec Clock GenerationMicrocontroller Clock Sample Interrupt SintPhase-Adjustment Strategy Mclken RCOMclkin Frequency Synthesizer Interface Clkpol Numclks Lowval HighvalMSB/LSB First Syndta±14. Synthesizer Control Fields Name DescriptionPower Control Port 15. External Power Control SignalsName Suggested External Application Reset Synclk Syndta SYNLE1 SYNLE0 SynrdyIqrxen Txen Mode WBD WbdonOUT1 Fmrxen ScenMicrocontroller-DSP Communications DintFifo a Fifo B Cint DSPMicrocontroller Register Map ±16. Microcontroller Register MapAddr Name Category Wide-Band Data/Control Register±17. Microcontroller Register Definitions ±18. WBDCtrl Register BIT Name Function Reset ValueMicrocontroller Status and Control Registers LCD Contrast ±19. MStatCtrl Register BitsLDC D/A Lcden±21. DSP Register Definitions DSP Register Map±20. DSP Register Map Wide-Band Data Registers Base Station Offset RegisterDspcsl TCM4300 Dsprw Dspstrbl Sint Cint Bdint DSP Strb INTDSP Status and Control Registers ±22. DStatCtrl Register BitsReset Power-On ResetInternal Reset State ±23. Power-On Reset Register InitializationIntel Microcontroller Mode Of Operation ±24. Microcontroller Interface Configuration±25. Microcontroller Interface Connections for Intel Mode Microcontroller InterfaceMitsubishi Microcontroller Mode of Operation Motorola Microcontroller Mode of OperationMcrw Mcds IRQ NMI DintCS3 ±32 Mechanical Data PZ S-PQFP-G100Important Notice