Texas Instruments TCM4300 Mitsubishi Microcontroller Mode of Operation, Mcrw Mcds, IRQ NMI Dint

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4.24.2Mitsubishi Microcontroller Mode of Operation

When the microcontroller type select MTS1 and MTS0 inputs are held high and low, respectively, the TCM4300 microcontroller interface is configured in Mitsubishi mode. In this mode, the interface has a single read/write control (R/W) signal, an active-low data strobe (MCDS) signal, and active-low interrupt request signals. The processor E and R/(W) signals should be connected to the TCM4300 MCDS signal and the MCRW signal, respectively. Table 4±26 lists the microcontroller interface connections for Mitsubishi mode.

 

Table 4±26. Microcontroller Interface Connections for Mitsubishi Mode

TCM4300

 

 

 

 

 

MICROCONTROLLER TERMINAL

TERMINAL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MTS1, MTS0

 

 

Tie to logic levels: high and low, respectively

 

 

 

 

 

 

 

MCCSH

 

 

Not on microcontroller; can be used for address decoding

 

 

 

 

 

 

 

MCCSL

 

 

Not on microcontroller; can be used for address decoding

 

 

 

 

 

 

 

MCD7±MCD0

 

 

D[7:0] data bus on microcontroller

 

 

 

 

 

 

 

MCA4±MCA0

 

 

A[4:0]

 

 

 

 

 

MCRW

 

 

 

 

 

 

 

 

R/W

 

 

 

 

 

MCDS

 

 

 

(Active-low read data strobe) MCDS configured to active-low operation by MTS1 and MTS0.

 

 

E

 

 

 

 

MWBDFINT

 

 

Either one of INT3 through INT0 as appropriate

 

 

 

 

DINT

 

 

Either one of INT3 through INT0 as appropriate

4.24.3Motorola Microcontroller Mode of Operation

When the microcontroller selects MTS0 = high and MTS1 = low, the TCM4300 microcontroller interface is configured for 8-bit family (6800 family derivatives, e.g., 68HC11D3 and 68HC11G5) bus characteristics, and when the microcontroller selects MTS0 = low and MTS1 = high, the microcontroller interface is configured for 16-bit family (680 0 family derivatives, e.g., 68008 and 68302) characteristics. The Motorola mode makes use of a single read/write control (R/W) signal and active-low interrupt request signals. The processor E (8-bit) or DS (16-bit) and (R/W) control signals should be connected to the TCM4300 MCDS signal and the MCRW signal, respectively. Table 4±27 illustrates the connections between the TCM4300 and an 8-bit Motorola processor. Table 4±28 illustrates the connections between the TCM4300 and a 16-bit Motorola processor.

Table 4±27. Microcontroller Interface Connections for Motorola Mode (8 bits)

TCM4300

 

 

 

 

 

 

MICROCONTROLLER TERMINAL

TERMINAL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MTS1, MTS0

 

Tie to logic levels: low and high, respectively

 

 

 

 

 

 

 

 

MCCSH

 

Not on microcontroller; can be used for address decoding

 

 

 

 

 

 

 

 

MCCSL

 

Not on microcontroller; can be used for address decoding

 

 

 

 

 

 

 

 

MCD7±MCD0

 

PC[7:0] data bus on microcontroller

 

 

 

 

 

 

 

 

MCA4±MCA0

 

Demultiplexed address output. PF[4:0] on microcontroller for nonmultiplexed machines (e.g.,

 

 

68CH11G5) and not on micro for multiplexed bus machines (e.g., 68HC11D3).

 

 

 

 

 

 

MCRW

 

 

 

 

 

 

 

 

R/W

 

 

 

 

 

 

 

 

 

MCDS

 

E (Active-high data strobe) MCDS configured to active-high operation by MTS1 and MTS0.

 

 

 

 

 

MWBDFINT

 

 

 

and/or

 

as appropriate

 

IRQ

NMI

 

 

 

DINT

 

 

 

and/or

 

as appropriate

 

IRQ

NMI

4±30

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Contents Data Manual SLWS010F TCM4300 Data Manual Important Notice Contents Mechanical Data ±1 List of Illustrations List of Tables Introduction FeaturesTCM4300 Functional Block Diagram PZ Package TOP View Pin AssignmentsVSS FmrxenTerminal Description Name Terminal FunctionsDspstrbl DsprwDvdd DvssMTS1 McdsMclkin McrwSint ScenSynclk SyndtaDissipation Rating Table Power Rating Above TA = 25CPackage Derating FactorRecommended Operating Conditions Power ConsumptionReference Characteristics RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Terminal ImpedanceFunction MIN TYP² MAX Unit Parameter Test Conditions MIN TYP MAX UnitParameter MIN TYP MAX Unit Transmit I and Q Channel OutputsAuxiliary D/A Converters Auxiliary D/A Converters Slope AGC, AFC, Pwrcont RSSI/Battery A/D ConverterAuxiliary D/A Converters Slope Lcdcontr Nominal LSB Nominal Output VoltageTransmit TX Channel Frequency Response Digital Mode Transmit TX Channel Frequency Response Analog Mode Page VOH VOL Mclkout Timing Requirements see ±1 and NoteMclkout Mcds Parameter Alternate MIN MAX UnitMcrw MCA4±MCA0 MCD7±MCD0 Mccsh MccslMCA4±MCA0 Parameter Alternate MIN MAX Unit SymbolMCA4±MCA0 MCD7±MCD0 Twdho MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl Motorola 16-Bit Read Cycle, MTS 10 =MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl Mcrw MCA0±MCA410% ThR / W ThWA Dspstrbl DspcslDsprw Dspa Dspd±11. TCM4300 to DSP Interface Write Cycle ±12 Control Signal Analog Mode Digital Mode ±1. TCM4300 Receive Channel Control SignalsMode Fmvox Iqrxen Fmrxen Data Transfer±2. RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Transmit Section ±5. Transmit TX I and Q Channel Outputs Modulation error percentage +100 s %±7. Transmit TX Channel Frequency Response Analog Mode Transmit Burst Operation Digital Mode±6. Transmit TX Channel Frequency Response Digital Mode ±1. Power Ramp-Up/Ramp-Down TIming Diagram Wide-Band Data Demodulator Transmit I And Q Output LevelWide-band Data Interrupts ±8. Typical Bit-Error-Rate Performance Wbdbw =±9. Bits in Control Register WBDCtrl Parameter Test Conditions MIN MAX Unit Mean CNRWBD Wide-band Data Demodulator General Information±11. Auxiliary D /A Converters Slope AGC, AFC, Pwrcont Auxiliary DACs, LCD Contrast Converter±10. Auxiliary D/A Converters ±13. RSSI/Battery A/D Converter RSSI, Battery MonitorTiming And Clock Generation ±12. Auxiliary D /A Converters Slope LcdcontrSpeech-Codec Clock Generation Clock GenerationMicrocontroller Clock Sample Interrupt SintPhase-Adjustment Strategy Mclken RCOMclkin Frequency Synthesizer Interface Highval Clkpol Numclks LowvalMSB/LSB First SyndtaName Description ±14. Synthesizer Control Fields15. External Power Control Signals Power Control PortName Suggested External Application Reset Synclk Syndta SYNLE1 SYNLE0 SynrdyWBD Wbdon Iqrxen Txen ModeOUT1 Fmrxen ScenDint Microcontroller-DSP CommunicationsFifo a Fifo B Cint DSP±16. Microcontroller Register Map Microcontroller Register MapAddr Name Category Wide-Band Data/Control Register±17. Microcontroller Register Definitions ±18. WBDCtrl Register BIT Name Function Reset ValueMicrocontroller Status and Control Registers ±19. MStatCtrl Register Bits LCD ContrastLDC D/A Lcden±21. DSP Register Definitions DSP Register Map±20. DSP Register Map Base Station Offset Register Wide-Band Data RegistersDspcsl TCM4300 Dsprw Dspstrbl Sint Cint Bdint DSP Strb INT±22. DStatCtrl Register Bits DSP Status and Control RegistersPower-On Reset ResetInternal Reset State ±23. Power-On Reset Register Initialization±24. Microcontroller Interface Configuration Intel Microcontroller Mode Of Operation±25. Microcontroller Interface Connections for Intel Mode Microcontroller InterfaceMotorola Microcontroller Mode of Operation Mitsubishi Microcontroller Mode of OperationMcrw Mcds IRQ NMI DintCS3 ±32 PZ S-PQFP-G100 Mechanical DataImportant Notice