Texas Instruments TCM4300 manual Transmit Section

Page 38

Table 4±3. Receive (RX) Channel Frequency Response (FM Input in Analog Mode)

PARAMETER

 

TEST CONDITIONS

MIN TYP MAX

UNIT

 

 

 

 

 

 

 

 

 

0 kHz to 6 kHz (see Note 1)

± 0.5

 

Frequency response

2.5

V peak-to-peak

 

 

dB

20 kHz to 30 kHz (see Note 2)

± 18

 

 

 

 

 

 

 

 

 

34 kHz to 46 kHz (see Note 3)

± 48

 

 

 

 

 

 

 

Peak-to-peak group

2.5

V peak-to-peak,

0 kHz to 6 kHz

2

μs

delay distortion

 

 

 

 

 

 

 

 

 

 

 

Absolute channel delay

2.5

V peak-to-peak,

0 kHz to 6 kHz

400

μs

 

 

 

 

 

 

NOTES: 1. Ripple magnitude

2.Stopband

3.Stopband and multiples of stopband

The VHR can provide a bias voltage for the received inputs when capacitively coupled from the RF section. To meet noise requirements, the VHR output should have an external decoupling capacitor connected to ground. The VHR output buffer is enabled by the OR of TXEN, FMVOX, and IQRXEN. The VHR output is high impedance otherwise.

In the digital mode, both the I and Q receive sides are enabled. Table 4±4 lists the receive channel frequency response.

Table 4±4. Receive (RX) Channel Frequency Response (RXI, RXQ Input in Digital Mode)

PARAMETER

TEST CONDITIONS

MIN TYP

MAX

UNIT

 

 

 

 

 

 

 

 

0 kHz to 8 kHz (see Note 4)

± 0.5

± 0.75

 

 

 

 

 

 

 

 

 

8 kHz to 15 kHz (see Note 4)

 

± 1

 

 

 

 

 

 

 

Frequency

0.125 V peak-to-peak

16.2 kHz to 18 kHz (see Note 2)

± 26

 

dB

response

18 kHz to 45 kHz (see Note 2)

± 30

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

45 kHz to 75 kHz (see Note 2)

± 46

 

 

 

 

 

 

 

 

 

 

> 75 kHz

± 60

 

 

 

 

 

 

 

 

Peak-to-peak

 

 

 

 

 

group delay

0.125 V peak-to-peak,

0 kHz to 15 kHz

 

2

μs

distortion

 

 

 

 

 

 

 

 

 

 

 

Absolute channel

 

 

 

 

 

delay, RXI, Q IN to

0.125 V peak-to-peak,

0 kHz to 15 kHz

325

 

μs

digital OUT

 

 

 

 

 

 

 

 

 

 

 

NOTES: 2. Stopband

4. Deviation from ideal 0.35 square-root raised-cosine (SQRC) response.

When the I and Q sample conversion is complete and the data is placed in the RXI and RXQ sample registers, the SINT interrupt line is asserted to indicate the presence of that data. This occurs at 48.6-kHz rate in the digital mode and at 40-kHz rate in the analog mode. In the analog mode, only the RXQ conversion path is used, and the RXI path is powered down.

4.3Transmit Section

The transmit section operates in two distinct modes, digital or analog. The mode of operation is determined by the MODE bit of the DStatCtrl register. In the digital mode, data is input to the transmit section by writing to the TXI register. The resulting output is a π /4 DQPSK-modulated time division multiplexed (TDM) burst. In the analog mode, the data is in the form of direct I and Q samples which are written to both the TXI and TXQ registers, then D/A converted, filtered, and output through TXIP, TXIN, TXQP, and TXQN. The I and Q outputs are zero-IF FM signals; that is, no baseband connection is necessary for FM transmission.

In the digital mode (MODE = 1), the data is written to the TXI register using the SINT interrupt to synchronize the data transfer. The TCM4300 performs parallel-to-serial conversion of the bits in the TXI register and encodes the resulting bit stream as π /4 DQPSK data samples. These samples are then filtered by a digital

4±3

Page 37 Page 39
Image 38
Page 37 Page 39
Contents Data Manual SLWS010F TCM4300 Data Manual Important Notice Contents Mechanical Data ±1 List of Illustrations List of Tables Features IntroductionTCM4300 Functional Block Diagram VSS Pin AssignmentsPZ Package TOP View FmrxenTerminal Functions Terminal Description NameDvdd DsprwDspstrbl DvssMclkin McdsMTS1 McrwSynclk ScenSint SyndtaPackage Power Rating Above TA = 25CDissipation Rating Table Derating FactorRecommended Operating Conditions Power ConsumptionReference Characteristics Function MIN TYP² MAX Unit Terminal ImpedanceRXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Parameter Test Conditions MIN TYP MAX UnitParameter MIN TYP MAX Unit Transmit I and Q Channel OutputsAuxiliary D/A Converters Auxiliary D/A Converters Slope Lcdcontr RSSI/Battery A/D ConverterAuxiliary D/A Converters Slope AGC, AFC, Pwrcont Nominal LSB Nominal Output VoltageTransmit TX Channel Frequency Response Digital Mode Transmit TX Channel Frequency Response Analog Mode Page VOH VOL Mclkout Timing Requirements see ±1 and NoteMclkout Mcrw Parameter Alternate MIN MAX UnitMcds MCA4±MCA0 MCD7±MCD0 Mccsh MccslParameter Alternate MIN MAX Unit Symbol MCA4±MCA0MCA4±MCA0 MCD7±MCD0 Twdho Motorola 16-Bit Read Cycle, MTS 10 = MCA0±MCA4 MCD0±MCD7 Mccsh MccslMCA0±MCA4 Mcrw MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl10% ThR / W ThWA Dsprw DspcslDspstrbl Dspa Dspd±11. TCM4300 to DSP Interface Write Cycle ±12 Mode Fmvox Iqrxen Fmrxen ±1. TCM4300 Receive Channel Control SignalsControl Signal Analog Mode Digital Mode Data Transfer±2. RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Transmit Section Modulation error percentage +100 s % ±5. Transmit TX I and Q Channel Outputs±7. Transmit TX Channel Frequency Response Analog Mode Transmit Burst Operation Digital Mode±6. Transmit TX Channel Frequency Response Digital Mode ±1. Power Ramp-Up/Ramp-Down TIming Diagram Transmit I And Q Output Level Wide-Band Data Demodulator±9. Bits in Control Register WBDCtrl ±8. Typical Bit-Error-Rate Performance Wbdbw =Wide-band Data Interrupts Parameter Test Conditions MIN MAX Unit Mean CNRWide-band Data Demodulator General Information WBD±11. Auxiliary D /A Converters Slope AGC, AFC, Pwrcont Auxiliary DACs, LCD Contrast Converter±10. Auxiliary D/A Converters Timing And Clock Generation RSSI, Battery Monitor±13. RSSI/Battery A/D Converter ±12. Auxiliary D /A Converters Slope LcdcontrMicrocontroller Clock Clock GenerationSpeech-Codec Clock Generation Sample Interrupt SintPhase-Adjustment Strategy Mclken RCOMclkin Frequency Synthesizer Interface MSB/LSB First Clkpol Numclks LowvalHighval Syndta±14. Synthesizer Control Fields Name DescriptionName Suggested External Application Reset Power Control Port15. External Power Control Signals Synclk Syndta SYNLE1 SYNLE0 SynrdyOUT1 Iqrxen Txen ModeWBD Wbdon Fmrxen ScenFifo a Fifo B Microcontroller-DSP CommunicationsDint Cint DSPMicrocontroller Register Map ±16. Microcontroller Register MapAddr Name Category Wide-Band Data/Control Register±17. Microcontroller Register Definitions ±18. WBDCtrl Register BIT Name Function Reset ValueMicrocontroller Status and Control Registers LDC D/A LCD Contrast±19. MStatCtrl Register Bits Lcden±21. DSP Register Definitions DSP Register Map±20. DSP Register Map Dspcsl TCM4300 Dsprw Dspstrbl Sint Cint Bdint Wide-Band Data RegistersBase Station Offset Register DSP Strb INTDSP Status and Control Registers ±22. DStatCtrl Register BitsInternal Reset State ResetPower-On Reset ±23. Power-On Reset Register Initialization±25. Microcontroller Interface Connections for Intel Mode Intel Microcontroller Mode Of Operation±24. Microcontroller Interface Configuration Microcontroller InterfaceMcrw Mcds Mitsubishi Microcontroller Mode of OperationMotorola Microcontroller Mode of Operation IRQ NMI DintCS3 ±32 Mechanical Data PZ S-PQFP-G100Important Notice
Top Page Image Contents