Texas Instruments TCM4300 WBD Wbdon, OUT1, Fmrxen Scen, Fmrxen Fmvox, Iqrxen Txen Mode, Synol

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In addition to allowing control of power to external functional modules, these power control bits combined with other control bits are used to control internal TCM4300 functions. This control system is shown in Figure 4±9.

WBD	WBD_ON	WBD Demodulator Circuit
Ctrl		WBD Demodulator Circuit
Ctrl
			OUT1
MIntCtrl	FMRXEN
MIntCtrl
	SCEN	SC Clock Generation
	SCEN		SCEN
			SCEN
	FMRXEN		FMRXEN
	FMVOX	Q-Side Input MUX
	FMVOX
DStatCtrl	OUT1	Q-Side RX Enable	VHR High Drive Enable
	OUT1		(Hi-Z when disabled)
		I-Side RX Enable	(Hi-Z when disabled)
	IQRXEN	I-Side RX Enable
	IQRXEN		IQRXEN
			IQRXEN
	TXEN		TXEN
			TXEN
	MODE	TX and RX Filter Select
	TXGO	TX and RX Filter Select
	TXGO	TX Signal Processing
		TX Signal Processing
		PWRCONT, Enable (Hi-z when disabled)

		SYNOL
		PAEN
	MStatCtrl	Transmitter
	MStatCtrl	Control
		Control
		Circuits
		TXONIND
		MPAEN

Figure 4±9. Internal and External Power Control Logic

To allow for further system power savings, the TCM4300 receive I and Q channels are enabled separately because only the Q side is used in analog mode. The FMVOX bit controls the Q-side input multiplexer. When FMVOX is high, the QP side of the receiver is connected to the FM input terminal, the QN input is connected to the VHR reference voltage, and the Q side of the receiver is powered up. The MODE bit controls the Q-side filter characteristics for digital or analog mode. The IQRXEN bit enables both the I and Q receiver sides. The bit IQRXEN can be set high while still in analog mode (FMVOX high or MODE low) to allow sufficient power-up settling time for the external receiver I and Q circuits.

Setting the MODE bit low connects RXQP to the FM input and RXQN to VHR.

In the digital mode (MODE bit set high), setting IQRXEN high turns on both sides of the receiver. The TXEN enables the internal transmit functions. When the TXEN bit is set low, the PWRCONT output goes to a high-impedance state and the PAEN output is set low. The TXEN signal can be used to power down most of the external transmit circuits between transmit bursts.

4±19

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Contents Data Manual SLWS010F TCM4300 Data Manual Important Notice Contents Mechanical Data ±1 List of Illustrations List of Tables Features IntroductionTCM4300 Functional Block Diagram VSS Pin AssignmentsPZ Package TOP View FmrxenTerminal Functions Terminal Description NameDvdd DsprwDspstrbl DvssMclkin McdsMTS1 McrwSynclk ScenSint SyndtaPackage Power Rating Above TA = 25CDissipation Rating Table Derating FactorPower Consumption Reference CharacteristicsRecommended Operating Conditions Function MIN TYP² MAX Unit Terminal ImpedanceRXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Parameter Test Conditions MIN TYP MAX UnitTransmit I and Q Channel Outputs Auxiliary D/A ConvertersParameter MIN TYP MAX Unit Auxiliary D/A Converters Slope Lcdcontr RSSI/Battery A/D ConverterAuxiliary D/A Converters Slope AGC, AFC, Pwrcont Nominal LSB Nominal Output VoltageTransmit TX Channel Frequency Response Digital Mode Transmit TX Channel Frequency Response Analog Mode Page Mclkout Timing Requirements see ±1 and Note MclkoutVOH VOL Mcrw Parameter Alternate MIN MAX UnitMcds MCA4±MCA0 MCD7±MCD0 Mccsh MccslParameter Alternate MIN MAX Unit Symbol MCA4±MCA0MCA4±MCA0 MCD7±MCD0 Twdho Motorola 16-Bit Read Cycle, MTS 10 = MCA0±MCA4 MCD0±MCD7 Mccsh MccslMCA0±MCA4 Mcrw MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl10% ThR / W ThWA Dsprw DspcslDspstrbl Dspa Dspd±11. TCM4300 to DSP Interface Write Cycle ±12 Mode Fmvox Iqrxen Fmrxen ±1. TCM4300 Receive Channel Control SignalsControl Signal Analog Mode Digital Mode Data Transfer±2. RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Transmit Section Modulation error percentage +100 s % ±5. Transmit TX I and Q Channel OutputsTransmit Burst Operation Digital Mode ±6. Transmit TX Channel Frequency Response Digital Mode±7. Transmit TX Channel Frequency Response Analog Mode ±1. Power Ramp-Up/Ramp-Down TIming Diagram Transmit I And Q Output Level Wide-Band Data Demodulator±9. Bits in Control Register WBDCtrl ±8. Typical Bit-Error-Rate Performance Wbdbw =Wide-band Data Interrupts Parameter Test Conditions MIN MAX Unit Mean CNRWide-band Data Demodulator General Information WBDAuxiliary DACs, LCD Contrast Converter ±10. Auxiliary D/A Converters±11. Auxiliary D /A Converters Slope AGC, AFC, Pwrcont Timing And Clock Generation RSSI, Battery Monitor±13. RSSI/Battery A/D Converter ±12. Auxiliary D /A Converters Slope LcdcontrMicrocontroller Clock Clock GenerationSpeech-Codec Clock Generation Sample Interrupt SintPhase-Adjustment Strategy RCO MclkinMclken Frequency Synthesizer Interface MSB/LSB First Clkpol Numclks Lowval Highval Syndta±14. Synthesizer Control Fields Name DescriptionName Suggested External Application Reset Power Control Port15. External Power Control Signals Synclk Syndta SYNLE1 SYNLE0 SynrdyOUT1 Iqrxen Txen ModeWBD Wbdon Fmrxen ScenFifo a Fifo B Microcontroller-DSP CommunicationsDint Cint DSPMicrocontroller Register Map ±16. Microcontroller Register MapWide-Band Data/Control Register ±17. Microcontroller Register DefinitionsAddr Name Category BIT Name Function Reset Value Microcontroller Status and Control Registers±18. WBDCtrl Register LDC D/A LCD Contrast±19. MStatCtrl Register Bits LcdenDSP Register Map ±20. DSP Register Map±21. DSP Register Definitions Dspcsl TCM4300 Dsprw Dspstrbl Sint Cint Bdint Wide-Band Data RegistersBase Station Offset Register DSP Strb INTDSP Status and Control Registers ±22. DStatCtrl Register BitsInternal Reset State ResetPower-On Reset ±23. Power-On Reset Register Initialization±25. Microcontroller Interface Connections for Intel Mode Intel Microcontroller Mode Of Operation±24. Microcontroller Interface Configuration Microcontroller InterfaceMcrw Mcds Mitsubishi Microcontroller Mode of OperationMotorola Microcontroller Mode of Operation IRQ NMI DintCS3 ±32 Mechanical Data PZ S-PQFP-G100Important Notice