ADTRAN ESU 120e user manual Port Tests, Test Name What it does

Chapter 7. Test Menu

The self-test consists of the following tests:

Test Name	What it does . . .
Board level tests	Each of the ESU 120e boards contains an on-
	board processor which executes the following
	series of tests checking the circuitry on the board:
	• RAM tests; EPROM checksum
	• TS0 map tests
	• On board data path (sending a known test pat-
	tern through an on-board loop)
Unit level tests	• Front panel LED verification
	• Phase-Lock Loop verify
	• Board-to-board interface test
	A test pattern is sent from the controller through
	a loopback on all other boards and is checked on
	the controller. This verifies the data path, clocks,
	and control signals.
	If a failure is detected, note the failure number
	prior to contacting ADTRAN Technical Support.
	The execution of self-test will disrupt normal
	data flow and prevent remote communication
	until the self-test is completed.

Port Tests

The Port Tests menu is used to activate testing of specific data ports. It controls the activation of loopbacks and the initiation of data test patterns. Test results are displayed in the LCD window.

The execution of Port Tests will disrupt normal data flow in the port being tested.

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