Software Optimization Guide for AMD64 Processors

25112 Rev. 3.06 September 2005

5.9L1 Data Cache Bank Conflicts

Optimization

Utilize pair loads that do not have a bank conflict in the L1 data cache to improve load thoughput.

Application

This optimization applies to:

32-bit software

64-bit software

Fields Used to Address the Multibank L1 Data Cache

The L1 data cache is a multibank design consisting of 8 banks total, where each bank is 8 bytes wide. To address the L1 data cache, the processor uses fields within the address as shown in the following diagram:

...

14

Index

6 5 3 2 0

Byte

Bank

How to Know If a Bank Conflict Exists

The existence of a bank conflict between two neighboring loads depends on their bank and index values:

When the bank is

And the index is

Then a bank conflict

 

 

 

Different

Either the same or different

Does not exist

 

 

 

The same

The same

Does not exist

 

 

 

The same

Different

Exists

 

 

 

In other words, with common data types, consecutive array elements cannot have a bank conflict. If the array elements are 4 bytes or less, the two loads are to the same index and the same bank, and no conflict occurs. If the array elements are 8 bytes, the loads are to the same index but different banks, so a bank conflict does not occur either.

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Cache and Memory Optimizations

Chapter 5

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AMD 250 manual L1 Data Cache Bank Conflicts, Fields Used to Address the Multibank L1 Data Cache