25112 Rev. 3.06 September 2005

Software Optimization Guide for AMD64 Processors

Table 1 summarizes the differences between AMD64 instructions, macro-ops, and micro-ops.

Table 1.

Instructions, Macro-ops and Micro-ops

 

 

 

 

 

 

Comparing

 

AMD64 instructions

Macro-ops

Micro-ops

 

 

 

 

 

Complexity

 

Complex

Average

Simple

 

 

A single instruction may

A single macro-op may

A single micro-op

 

 

specify one or more of

specify—at most—one

specifies only one of the

 

 

each of the following

integer or floating-point

following primitive

 

 

operations:

operation and one of the

operations:

 

 

• Integer or floating-point

following operations:

• Integer or floating-point

 

 

 

 

 

operation

• Load

• Load

 

 

 

 

 

 

• Load

• Store

• Store

 

 

 

 

 

 

• Store

• Load and store to the

 

 

 

 

same address

 

 

 

 

 

Encoded length

Variable (instructions are

Fixed (all macro-ops are

Fixed (all micro-ops are

 

 

different lengths)

the same length)

the same length)

 

 

 

 

 

Regularized

 

No (field locations and

Yes (field locations and

Yes (field locations and

instruction fields

definitions vary among

definitions are the same

definitions are the same

 

 

instructions)

for all macro-ops)

for all micro-ops)

 

 

 

 

 

Types of Instructions

Instructions are classified according to how they are decoded by the processor. There are three types of instructions:

Instruction Type

Description

 

 

DirectPath Single

A relatively common instruction that the processor decodes directly into one macro-op

 

in hardware.

 

 

DirectPath Double

A relatively common instruction that the processor decodes directly into two macro-

 

ops in hardware.

 

 

VectorPath

A sophisticated or less common instruction that the processor decodes into one or

 

more (usually three or more) macro-ops using the on-chip microcode-engine ROM

 

(MROM).

 

 

Chapter 1

Introduction

5

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AMD 250 manual Types of Instructions, Instructions, Macro-ops and Micro-ops, Mrom