AMD 250 manual Index

25112 Rev. 3.06 September 2005 Software Optimization Guide for AMD64 Processors

D.4 Memory Optimizations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .351

D.5 Memory Optimizations for Graphics-Engine Programming

Using the DMA Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .352

D.6 Optimizations for Texture-Map Copies to AGP Memory . . . . . . . . . . . . . . . . . . . .353 D.7 Optimizations for Vertex-Geometry Copies to AGP Memory . . . . . . . . . . . . . . . . .353

Appendix E SSE and SSE2 Optimizations		355
E.1	Half-Register Operations	356
E.2	Zeroing Out an XMM Register	357
E.3	Reuse of Dead Registers	359
E.4	Moving Data Between XMM Registers and GPRs	360
E.5	Saving and Restoring Registers of Unknown Format	361
E.6	SSE and SSE2 Copy Loops	362
E.7	Explicit Load Instructions	363
E.8	Data Conversion	364

Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .367

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