Software Optimization Guide for AMD64 Processors

25112 Rev. 3.06 September 2005

9.10EMMS and FEMMS Usage

Optimization

Use FEMMS or EMMS to clean up the register file between an x87 instruction and a following MMX, 3DNow!, or Enhanced 3DNow! instruction or vice versa.

Application

This optimization applies to:

32-bit software

64-bit software

Rationale

Use either the FEMMS or the EMMS instruction when switching between the x87 floating-point unit and MMX, 3DNow!, or Enhanced 3DNow! instructions. The FEMMS instruction is aliased to the EMMS instruction on AMD Athlon 64 and AMD Opteron processors. Both instructions convert to an internal NOP instruction in AMD Athlon 64 and AMD Opteron processors. The FEMMS instruction is provided to help ensure that code written for previous generations of AMD processors runs correctly.

There is no penalty for switching between the x87 floating-point instructions and 3DNow! (or MMX) instructions in the processor. The MMX, 3DNow!, and Enhanced 3DNow! instructions are designed to be used concurrently; therefore, no delimiting cleanup operations are required when switching between them. However, x87 and 3DNow!/Enhanced 3DNow!/MMX instructions share the same

architectural registers, so there is no easy way to use them concurrently without cleaning up the register file in between by using FEMMS or EMMS. For more information, see AMD64 Architecture Programmer’s Manual Volume 1: Application Programming, order# 24592.

210

Optimizing with SIMD Instructions

Chapter 9

Page 226
Image 226
AMD 250 manual Emms and Femms Usage, 210