AMD 250 manual Bit Registers and Integer Arithmetic

Software Optimization Guide for AMD64 Processors 25112 Rev. 3.06 September 2005

3.164-Bit Registers and Integer Arithmetic

Optimization

Use 64-bit registers for 64-bit integer arithmetic.

Rationale

Using 64-bit registers instead of their 32-bit equivalents can dramatically reduce the amount of code necessary to perform 64-bit integer arithmetic.

Example 1

This code performs 64-bit addition using 32-bit registers:

;Add ECX:EBX to EDX:EAX, and place sum in EDX:EAX. 00000000 03 C3 add eax, ebx

00000002 13 D1 adc edx, ecx

Using 64-bit registers, the previous code can be replaced by one simple instruction (assuming that RAX and RBX contain the 64-bit integer values to add):

00000000 48 03 C3 add rax, rbx

Although the preceding instruction requires one additional byte for the REX prefix, it is still one byte shorter than the original code. More importantly, this instruction still has a latency of only one cycle, uses two fewer registers, and occupies only one decode slot.

60 General 64-Bit Optimizations Chapter 3