ADSP-2181/ADSP-2183
ADSP-2181/ADSP-2183
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| Min | Max | Unit |
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Memory Write |
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Switching Characteristics: |
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tDW | Data Setup before | WR | High | 0.5tCK – 7+ w |
| ns | ||||||||||||||||||||
tDH | Data Hold after WR High | 0.25tCK – 2 |
| ns | ||||||||||||||||||||||
tWP | WR | Pulse Width | 0.5tCK – 5 + w |
| ns | |||||||||||||||||||||
tWDE | WR | Low to Data Enabled | 0 |
| ns | |||||||||||||||||||||
tASW | xMS | Setup before | WR | Low | 0.25tCK – 6 |
| ns | |||||||||||||||||||
tDDR | Data Disable before | WR | or | RD | Low | 0.25tCK – 7 |
| ns | ||||||||||||||||||
tCWR | CLKOUT High to | WR |
| Low | 0.25tCK – 5 | 0.25 tCK + 7 | ns | |||||||||||||||||||
tAW | WR | Deasserted | 0.75tCK – 9 + w |
| ns | |||||||||||||||||||||
tWRA | xMS | Hold after | WR | Deasserted | 0.25tCK – 3 |
| ns | |||||||||||||||||||
tWWR | WR | High to | RD | or | WR | Low | 0.5tCK – 5 |
| ns |
w = wait states x tCK
xMS = PMS, DMS, CMS, IOMS, BMS
CLKOUT
DMS, PMS,
BMS, CMS,
IOMS
WR
D
tASW
tCWR
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| tWRA |
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| tWWR |
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| tWP |
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| tAW |
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| tDH |
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| tDDR |
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tDW tWDE
RD
Figure 26. Memory Write
REV. 0 |