ADSP-2181/ADSP-2183

ADSP-2181

Parameter

 

 

 

 

 

 

Min

Max

Unit

 

 

 

 

 

 

 

 

 

IDMA Write, Long Write Cycle

 

 

 

Timing Requirements:

 

 

 

tIKW

IACK

Low before Start of Write1

0

 

ns

tIKSU

IAD15–0 Data Setup before

IACK

Low2, 3

0.5tCK + 10

 

ns

tIKH

IAD15–0 Data Hold after IACK Low2, 3

2

 

ns

Switching Characteristics:

 

 

 

tIKLW

Start of Write to

IACK

Low4

1.5tCK

 

ns

tIKHW

Start of Write to IACK High

 

15

ns

ADSP-2183

 

 

 

 

 

 

 

 

 

28.8 MHz

 

 

Parameter

 

 

 

 

 

 

 

 

Min

Max

Unit

 

 

 

 

 

 

 

 

 

 

 

IDMA Write, Long Write Cycle

 

 

 

Timing Requirements:

 

 

 

tIKW

IACK

Low before Start of Write1

0

 

ns

tIKSU

IAD15–0 Data Setup before

IACK

Low2, 3

0.5tCK + 10

 

ns

tIKH

IAD15–0 Data Hold after

IACK

Low2, 3

2

 

ns

Switching Characteristics:

 

 

 

tIKLW

Start of Write to

IACK

Low4

1.5tCK

 

ns

tIKHW

Start of Write to

IACK

High

 

17

ns

NOTES

1Start of Write = IS Low and IWR Low.

2If Write Pulse ends before IACK Low, use specifications tIDSU, tIDH.

3If Write Pulse ends after IACK Low, use specifications tIKSU, tIKH.

4This is the earliest time for IACK Low from Start of Write. For IDMA Write cycle relationships, please refer to the User’s Manual.

 

tIKW

 

IACK

 

 

 

tIKHW

 

 

tIKLW

 

IS

 

 

IWR

 

 

 

tIKSU

tIKH

 

 

IAD 15–0

 

DATA

Figure 30. IDMA Write, Long Write Cycle

–28–

REV. 0

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Image 28
Analog Devices ADSP-2183, ADSP-2181 manual Parameter Min Max Unit Idma Write, Long Write Cycle