Cypress CY8CNP102E Power Up Recall Duration, Store Cycle Duration 12.5, Low Voltage Trigger Level

PRELIMINARY CY8CNP102B, CY8CNP102E

In the following table, tHRECALL starts from the time Vcc rises above VSWITCH. If an SRAM WRITE has not taken place since the last nonvolatile cycle, no STORE occurs. Industrial grade devices require 15 ms maximum.

Table 15.3.3V nvSRAM AutoStore/Power Up RECALL (CY8CNP102B)

Parameter	Description			nvSRAM				Unit
		Min			Max
tHRECALL	Power Up RECALL Duration			20				ms
tSTORE	STORE Cycle Duration			12.5				ms
VSWITCH	Low Voltage Trigger Level			2.65				V
tVccRISE	VCC Rise Time	150						μs
AC General Purpose IO Specifications
Table 16. 3.3V AC GPIO Specifications (CY8CNP102B)
Symbol	Description	Min	Typ		Max	Units		Notes
FGPIO	GPIO Operating Frequency	0	–		12.3	MHz	Normal Strong Mode
TRiseS	Rise Time, Slow Strong Mode, Cload = 50 pF	10	27		–	ns	Vcc = 3V to 3.6V
							10% - 90%
TFallS	Fall Time, Slow Strong Mode, Cload = 50 pF	10	22		–	ns	Vcc = 3V to 3.6V
							10% - 90%

Figure 6. GPIO Timing Diagram

90%

GPIO

Pin

Output

Voltage

10%

TRiseF	TFallF
TRiseS	TFallS

Document #: 001-43991 Rev. *D Page 18 of 38

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