Cypress CY8CNP102B, CY8CNP102E manual Development Tools, PSoC Designer Software Subsystems, Esigner

PRELIMINARY CY8CNP102B, CY8CNP102E

Development Tools

PSoC Designer is a Microsoft® Windows based, integrated development environment for Programmable System-on-Chip (PSoC) devices. The PSoC Designer IDE and application run on Windows NT 4.0, Windows 2000, Windows Millennium (Me), Microsoft Vista, and Windows XP.

PSoC Designer helps the customer to select an operating configuration for the PSoC, write application code that uses the PSoC, and debug the application. This system provides design database management by project, an integrated debugger with In-Circuit Emulator, in-system programming support, and the CYASM macro assembler for the CPUs.

PSoC Designer also supports a high level C language compiler developed specifically for the devices in this family.

Figure 2. PSoC Designer Subsystem

P S oC	G raphical Designer		C ontext
			S ensitive
	Interface
D esigner	Commands		H elp
		Results
Im portable
D esign
D atabase
D evice			P S oC
D atabase	P S oC		C onfiguration
			S heet
A pplication	D esigner
D atabase	C ore
	E ngine		M anufacturing
P roject			Inform ation
D atabase			File
U ser
M odules
Library
E m ulation	In-C ircuit		D evice
P od	E m ulator		P rogram m er

PSoC Designer Software Subsystems

Device Editor

The Device Editor subsystem enables the user to select different onboard analog and digital components called user modules, using the PSoC blocks. Examples of user modules are ADCs, DACs, nvSRAM, Amplifiers, and Filters.

The device editor also supports easy development of multiple configurations and dynamic reconfiguration. Dynamic configuration enables changing configurations at run time.

PSoC Designer sets up power on initialization tables for selected PSoC block configurations and creates source code for an application framework. The framework contains software to operate the selected components. Also, if the project uses more than one operating configuration, the framework contains routines to switch between different sets of PSoC block configurations at run time. PSoC Designer can print out a configuration sheet for a given project configuration, for use during application programming in conjunction with the Device Data Sheet. After the framework is generated, the user can add application specific code to flesh out the framework. It is also possible to change the selected components and regenerate the framework.

Design Browser

The Design Browser enables users to select and import preconfigured designs into their project. Users can easily browse a catalog of preconfigured designs to facilitate time to design. Examples provided in the tools include a 300 baud modem, LIN Bus master and slave, fan controller, and magnetic card reader.

Application Editor

In the Application Editor you can edit C language and Assembly language source code. You can also assemble, compile, link, and build.

Assembler. The macro assembler seamlessly merges the assembly code with C code. The link libraries automatically use absolute addressing or are compiled in relative mode, and linked with other software modules to get absolute addressing.

C Language Compiler. A C language compiler that supports Cypress PSoC family devices is available. Even if you have never worked in the C language before, the product quickly enables you to create complete C programs for the PSoC family devices.

The embedded, optimizing C compiler provides all the features of C tailored to the PSoC architecture. It is complete with embedded libraries providing port and bus operations, standard keypad and display support, and extended math functionality.

Debugger

The PSoC Designer Debugger subsystem provides hardware in-circuit emulation, which enables the designer to test the program in a physical system while providing an internal view of the PSoC device. Debugger commands enable the designer to read and program, read and write data memory, read and write IO registers, read and write CPU registers, set and clear breakpoints, and provide program run, halt, and step control. The debugger also enables the designer to create a trace buffer of registers and memory locations of interest.

Document #: 001-43991 Rev. *D Page 7 of 38

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