PRELIMINARY CY8CNP102B, CY8CNP102E
Document #: 001-43991 Rev. *D Page 6 of 38
Programmable Digital System
The digital system contains 16 digital PSoC blocks. Each block
is an 8-bit resource that is used alone or combined with other
blocks to form 8, 16, 24, and 32-bit peripherals, which are called
user module references. The digital peripheral configurations
are:
■PWMs (8 to 32 bit)
■PWMs with dead band (8 to 32 bit)
■Counters (8 to 32 bit)
■Timers (8 to 32 bit)
■UART 8 bit with selectable parity (up to 4)
■SPI master and slave (up to 4 each)
■I2C slave and multimaster (1 available as a System Resource)
■Cyclical Redundancy Checker and Generator (8 to 32 bit)
■IrDA (up to 4)
■Pseudo Random Sequence Generators (8 to 32 bit)
The digital blocks connect to any GPIO through a series of global
buses that route any signal to any pin. The buses also enable
signal multiplexing and performing logic operations. This
configurability frees your designs from the constraints of a fixed
peripheral controller.
Digital blocks are provided in rows of four, where the number of
blocks varies with PSoC device family. This gives you the
optimum choice of system resources for your application.
Programmable Analog System
The analog system consists 12 configurable blocks, each having
an opamp circuit enabling the creation of complex analog signal
flows. Analog peripherals are very flexible and may be
customized to support specific application requirements. Some
of the more common analog functions (most available as user
modules) are:
■Analog-to-digital converters (up to 4, with 6 to 14 bit resolution,
selectable as Incremental, Delta Sigma, and SAR)
■Filters (2, 4, 6, or 8 pole band pass, low pass, and notch)
■Amplifiers (up to 4, with selectable gain to 48x)
■Instrumentation amplifiers (up to 2, with selectable gain to 93x)
■Comparators (up to 4, with 16 selectable thresholds)
■DACs (up to 4, with 6 to 9 bit resolution)
■Multiplying DACs (up to 4, with 6 to 9 bit resolution)
■High current output drivers (four with 40 mA drive as a Core
Resource)
■1.3V reference (as a System Resource)
■DTMF Dialer
■Modulators
■Correlators
■Peak Detectors
■Other possible topologies
■Analog blocks are provided in columns of three, which includes
one CT (Continuous Time) and two SC (Switched Capacitor)
blocks.
Additional System Resources
System Resources, some of which are listed in the previous
sections, provide additional capability useful to complete
systems. Resources include a multiplier, decimator, switch mode
pump, low voltage detection, and power on reset. The merits of
each system resource are:
■Digital clock dividers provide three customizable clock
frequencies for use in applications. The clocks may be routed
to both the digital and analog systems. Additional clocks are
generated using digital PSoC blocks as clock dividers.
■Multiply Accumulate (MAC) provides fast 8-bit multiplier with
32-bit accumulate, to assist in general math and digital filters.
■The decimator provides a custom hardware filter for digital
signal, and processing applications including the creation of
Delta Sigma ADCs.
■The I2C module provides 100 and 400 kHz communication over
two wires. Slave, master, and multi master modes are all
supported.
■Low Voltage Detection (LVD) interrupts can signal the
application of falling voltage levels, while the advanced POR
(Power On Reset) circuit eliminates the need for a system
supervisor.
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