Cypress SL811HS 28 PLCC

SL811HS

Document 38-08008 Rev. *D Page 18 of 32

Physical Connections

These parts are offered in both a 28-pin PLCC package and a 48-pin TQFP package. The 28-pin PLCC packages are the

SL811HS and SL811HS-JCT. The 48-pin TQFP packages is the SL811HST-AXC.

28-Pin PLCC Physical Connections

28-Pin PLCC Pin Layout

*See Table35 on page 21 for Pin and Signal Description for Pins 2 and 3 in Host Mode.

28-Pin PLCC Mechanical Dimensions

228

nDACK*

nDRQ*

nRD

nWR

Gnd

INTRQ

VDD1

nRST

VDD2

Gnd

nCS

DATA-

DATA+

VDD1

CLK/X1

28 PLCC

A0 M/S

171615

325

Figure 4. 28-pin PLCC USB Host/Slave Controller — Pin Layout

Contents

Main SL811HS Embedded USB Host/Slave Controller SL811HS Features Block Diagram Introduction Page SL811HS Registers Page Page Page Page Page Page Page SL811HS Page Page Page Page Page Page Document 38-08008 Rev. *D Page 18 of 32 Physical Connections Figure 4. 28-pin PLCC USB Host/Slave Controller Pin Layout 28 PLCC 28-Pin PLCC Mechanical Dimensions Page Document 38-08008 Rev. *D Page 20 of 32 48-Pin TQFP Physical Connections 48-Pin TQFP AXC Pin Layout NC 12 48-Pin TQFP Figure 6. 48-Pin TQFP AXC USB Host/Slave Controller Pin Layout Page Page Page Electrical Specifications Page nWR A0 D0-D7 DATA nCS I/O Write Cycle to R e g is te r o r Memory Buffer nRD A0 D0-D7 DATA nCS I/O Read Cycle from Register or Mem o ry Buffer nWR DMA Write Cycle nDRQ nDACK D0-D7 DATA nRD SL811 DMA READ C YC LE TIMING nRST SL811 DMA Read Cycle Timing treset nRD or nWR Reset Timing Ordering Information CLK CLOCK TIMING Package Diagrams Document History Page