Clock Structure, Reset Structure | Emerson MVME2500 instruction

Functional Description

4.16Clock Structure

A total of three IDT chips, a discrete oscillator and crystal to support all the clock requirements of MVME2500.

Figure 4-3 Clock Distribution Diagram

4.17Reset Structure

MVME2500 reset will initiate after the power up sequence if the 1.5 V power supply is "GOOD". When the board is at "ready" state, the reset logic will monitor the reset sources and implement the necessary reset function.

76	MVME2500 Installation and Use (6806800L01H)

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Emerson MVME2500 manual Clock Structure, Reset Structure

Contents

MVME2500 Contact Address Contents Contents Contents Memory Maps and Registers Emerson Network Power Embedded Computing Documents Safety Notes Sicherheitshinweise Index List of Tables List of Tables List of Figures Figure A-1 List of Figures About this Manual Overview of ContentsAbbreviations About this Manual Conventions USBVita VME About this Manual About this Manual Summary of Changes Documentation, on Introduction Key Features of the MVME2500Overview KB Mram Introduction 8 KB VPD Eeprom Standard Compliances Board Standard Compliances Mechanical Data Ordering InformationMechanical Data Available Board Variants Available Board Accessories VME-HDMNTKITVME-64GBSSDKIT SERIAL-MINI-D Product Identification Serial Number Location Hardware Preparation and Installation Unpacking and Inspecting the Board Hardware Preparation and InstallationRequirements Environmental Requirements Environmental RequirementsGrms Power Requirements Power Requirements Configuring the Board Equipment Requirements Installing Accessories Rear Transition Module Installation Procedure 2 PMC/XMC Support Installing and Removing the Board Hardware Preparation and Installation Completing the Installation Controls, LEDs, and Connectors Board Layout Controls, LEDs, and Connectors Front Panel LEDs Reset SwitchFront Panel LEDs User FailGENET1 TSEC1 Speed Onboard LEDs ConnectorsOnboard LEDs Status Front Panel Tri-Speed Ethernet Connector J1 Front Panel Connectors1.1 RJ45 with Integrated Magnetics J1 Front Panel Serial Port J4 Front Panel Serial Port J4 Controls, LEDs, and Connectors USB Connector J5 VMEBus P1 ConnectorUSB Connector J5 VMEbus P1 Connector DS0 BR1 Lword GA2 Write BR2 GND BR3GA3 Dtack GA4 Controls, LEDs, and Connectors VMEBus P2 Connector VMEbus P2 Connector Flash Program Connector P7 Onboard ConnectorsFlash Programming Header P7 Sata Connector J3 Custom Sata Connector J3GND Sata Power Enable Sata TX + Sata Detect Sata RX PMC Connectors 10 PMC J11 Connector 11 PMC J12 Connector 12 PMC J13 Connector GND CBE7 CBE6 CBE5 CBE4 PAR64 13 PMC J14 Connector Jtag Connector P6 14 Jtag Connector P6 GPO0 Scan 2 TMS Scan 2 TDO Scan 2 TCK GND Scan 2 TDI Scan 3 TMS Scan 3 TCK1 Scan 3 TDOScan 3 TCK GND Scan 4 TDI Scan 4 TCK Scan 4 Trst Scan 5 TMS Scan 5 TDO Controls, LEDs, and Connectors COP Connector P6 SD Connector J216 SD Connector J2 15 COP Header P10 XMC Connector XJ2 17 XMC Connector XJ2 Pinout Miscellaneous P2020 Debug Connectors 18 P20x0 Debug Header Geographical Address Switch S1 SwitchesTrigin MSRCID4 GND VME Scon SEL2 GAP4GAP3 GAP2 SMT Configuration Switch S2 Masterwpdisa BledGbemuxsel Plane Functional Description Block DiagramChipset Integrated Memory Controller 1 e500 Processor CoreFunctional Description PCI Express Interface Local Bus Controller LBCSecure Digital Hub Controller Sdhc 6 I2C Interface Duart DMA ControllerEnhanced Three-Speed Ethernet Controller eTSEC General Purpose I/O Gpio Timers 14 P20x0 Hardware Configuration PinsSystem Memory Common On-Chip Processor COP Internal Timer Watchdog TimerFpga Tick Timer Ethernet Interfaces SPI Flash Memory SPI Bus InterfaceSPI Flash Programming Firmware Redundancy SPI Device Multiplexing Logic Crisis Recovery Front Uart Control Rear Uart Control PMC/XMC Sites PMC Add-on Card Sata InterfaceXMC Add-on Card VME Support 12 USB13 I2C Devices 11.1 Tsi148 VME Controller Reset/Control Fpga Power ManagementOnboard Voltage Supply Requirement Voltage Supply Requirement Power Up Sequencing Requirements Reset Structure Clock Structure Real-Time Clock Battery Reset SequenceThermal Management Thermal Interrupt Threshold Post Code Indicator Post Code Indicator on the LEDDebugging Support Jtag Chain and Board Transition Module Features Rear Transition Module RTMCustom Debugging SBC Functional Description Memory Map Memory Maps and RegistersPhysical Address Map Flash Memory Map Linux Devices Memory MapMemory Maps and Registers Flash Memory Map Linux Devices Memory Map Programmable Logic Device PLD Registers PLD Revision RegisterPLD Year Register PLD Revision Register PLD Day Register PLD Month RegisterPLD Sequence Register PLD Power Good Monitor Register PLD Power Good Monitor RegisterWrgd RGD Pwrg Oper Reset Rsvd Pwrv 10 PLD LED Control Register PLD LED Control RegisterPWRV1P2SWPWRG 11 PLD PCI/PMC/XMC Monitor Register PLD PCI/PMC/XMC Monitor RegisterPMC1PN PLD U-Boot and TSI Monitor Register PLD Boot Bank Register12 PLD U-Boot and TSI Monitor Register 13 PLD Boot Bank Register Bootb Boots Locka Wpdi WPN Ugen Flash Sabled Oper Reset PLD Write Protect and I2C Debug Register14 PLD Write Protect and I2C Debug Register Rsvd Master Flash I2CDEB Serial I2CDEBUGEN=0 15 PLD Test Register PLD Test Register16 PLD Test Register PLD GPIO2 Interrupt Register Rsvd NMI TICK0INT TICK1INT TICK2INT Oper Reset17 PLD GPIO2 Interrupt Register PLD Shutdown and Reset Control and Reset Reason Register 18 PLD Shutdown and Reset Control and Reset Reason RegisterCpureset Wdtime Lrsto Dnmask OUT Oper Reset PLD Watchdog Timer Refresh Register 19 PLD Watchdog Timer Refresh Register PLD Watchdog Timer Count Register 21 PLD Watchdog Timer Count RegisterPLD Watchdog Control Register 20 PLD Watchdog Control Register Prescaler Register External Timer Registers22 Prescaler Register COC ENC Oper Reset Control Registers23 Control Registers Ints Cint 24 Compare High Word Registers Compare High and Low Word Registers25 Compare Low Word Registers 26 Counter High Word Registers Counter High and Low Word Registers27 Counter Low Word Registers 102 Boot System Accessing U-Boot Booting from a Network Boot OptionsBoot System Booting from an Optional Sata Drive Booting from a USB Drive Booting from an SD Card Booting VxWorks Through the Network Using the Persistent Memory Feature Analyzing Kernel Log Files after a Kernel Panic MVME2500 Specific U-Boot Commands MVME2500 Specific U-Boot Commands Boot System Updating U-Boot Sf probe 112 POR Configuration Settings Reset ConfigurationProgramming Model Programming Model Config Config Pins Selection Remarks ETSEC2 Sgmii LGPL1 ETSEC3 Sgmmi TSEC1588ALARMEcmdc ETSEC1 TSEC1TXD0 Config Config Pins Selection Remarks Boot ROM TSEC1TXERLWE1/LBS1 TSEC2TXER Interrupt Controller MVME2500 Interrupt List I2C Bus Device Addressing Ethernet PHY AddressI2C Bus Device Addressing PHY Types and MII Management Bus Address Other Software Considerations MramQuad Uart TSEC3 LBC Timing Parameters LBC Timing Parameters Clock Distribution Clock Distribution System Clock System Clock Real Time Clock Input Local Bus Controller Clock Divisor 124 Replacing the Battery Replacing the Battery Replacing the Battery Replacement Procedure 128 Emerson Network Power Embedded Computing Documents Related Documentation Related Specifications Table B-3 Related SpecificationsManufacturers’ Documents Related Documentation PCI-SIG SATA-IO 132 Safety Notes EMC Results pending testing Safety Notes InstallationOperation Cabling and Connectors Battery Sicherheitshinweise Betrieb Sicherheitshinweise 139 Kabel und Stecker Batterie Umweltschutz 142 Index Index Page HOW to Reach Literature and Technical Support