Memory Maps and Registers

Table 5-8 PLD Sequence Register

REG

PLD Revision Register - 0xFFDF0007

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

Field

PLD Rev

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OPER

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESET

02

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5.5.6PLD Power Good Monitor Register

The MVME2500 PLD provides an 8-bit register which indicates the instantaneous status of the supply’s power good signals.

Table 5-9 PLD Power Good Monitor Register

REG

PLD PWRDG_MNTR - 0xFFDF0012

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

Field

RSVD

PWR_V

PWR_V

PWR_V

PWR_V

PWR_V

PWR_V

PWR_V

 

 

1P05_P

1P2_PW

1P8_PW

3P3_PW

2P5_PW

1P2_SW

1P5_PW

 

 

WRGD

RGD

RGD

RGD

RGD

_PWRG

RGD

 

 

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

OPER

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESET

0

0

0

0

0

0

0

0

 

 

 

 

 

 

 

 

 

Field Description

 

PWR_V1P05_PWRGD

1.05V Core supply power good indicator

PWR_V1P2_PWRGD

1.2V Supply power good indicator

PWR_V1P8_PWRGD

1.8V Supply power good indicator

86

MVME2500 Installation and Use (6806800L01H)

Page 86
Image 86
Emerson MVME2500 manual PLD Power Good Monitor Register, Rsvd Pwrv, Wrgd RGD Pwrg Oper Reset