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Emerson MVME2500 manual PLD U-Boot and TSI Monitor Register, PLD Boot Bank Register

Models: MVME2500

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Memory Maps and Registers

5.5.9PLD U-Boot and TSI Monitor Register

The MVME2500 PLD provides an 8-bit register which indicates the status of the U-Boot's normal environment switch and TSI interface signals.

Table 5-12 PLD U-Boot and TSI Monitor Register

REG	PLD PCI_PMC_XMC_MNTR - 0xFFDF001F

Bit	7	6	5		4	3	2	1	0

Field	RSVD	RSVD	RSVD		RSVD	RSVD	BDFAIL_N	NORMAL_ENV	SCON

OPER	R

RESET	0	0	0		0	0	X	X	X

	Field Description
	BDFAIL_N		TSI148 BDFAIL_N Pin out
			1	- No TSI Fail
			0	- TSI Fail
	NORMAL_ENV		Normal Environment Switch Indicator
			1	- Use safe ENV
			0	- Use normal ENV
	SCON		System Controller Indicator

1 - System Controller

0- Non-system Controller

5.5.10PLD Boot Bank Register

The MVME2500 PLD provides an 8-bit register which is used to declare successful U-Boot loading, indicating the SPI boot bank priority and actual SPI bank it booted from.

Table 5-13 PLD Boot Bank Register

REG	PLD Boot Bank - 0xFFDF0050

Bit	7	6	5	4	3	2	1	0

MVME2500 Installation and Use (6806800L01H)

Page 89

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Emerson MVME2500 12 PLD U-Boot and TSI Monitor Register, 13 PLD Boot Bank Register, Memory Maps and Registers

Contents

MVME2500 Installation and UseP/N 6806800L01H January Embedded Computing for Business-Critical ContinuityTMContact Address TrademarksLimited and Restricted Rights Legend 3 Controls, LEDs, and Connectors Contents2 Hardware Preparation and Installation Contents Contents Contents 5 Memory Maps and Registers Contents Contents6 Boot System B.1 Emerson Network Power - Embedded Computing Documents ContentsA Replacing the Battery 7 Programming ModelMVME2500 Installation and Use 6806800L01H Contents ContentsSafety Notes Sicherheitshinweise Index ListofTables MVME2500 Installation and Use 6806800L01H List of TablesFigure A-1 List of FiguresMVME2500 Installation and Use 6806800L01H List of FiguresAbbreviations Overview of ContentsAbout this Manual About this Manual About this Manual About this Manual ConventionsCourier + Bold ReferenceAbout this Manual About this Manual MVME2500 Installation and Use 6806800L01HNotation Description Logical ORAbout this Manual Summary of ChangesThis manual has been revised and replaces all prior editions  Edited Figure Component Layout Updated Figure Component Layout on  Updated Appendix B, RelatedAbout this Manual About this Manual pageIntroduction Table 1-1 Key Features of the MVME2500Chapter 1.1 OverviewIntroduction Table 1-1 Key Features of the MVME2500 continuedTable 1-2 Board Standard Compliances 1.2 Standard CompliancesTable 1-1 Key Features of the MVME2500 continued Introduction1.4 Ordering Information 1.3 Mechanical DataTable 1-3 Mechanical Data Table 1-4 Available Board VariantsIntroduction Table 1-5 Available Board AccessoriesFigure 1-1 Serial Number Location 1.5 Product IdentificationMVME2500 Installation and Use 6806800L01H IntroductionChapter Hardware Preparation and Installation2.1 Overview 2.2 Unpacking and Inspecting the Board Hardware Preparation and Installation2.3 Requirements Shipment InspectionHardware Preparation and Installation 2.3.1 Environmental RequirementsTable 2-1 Environmental Requirements Hardware Preparation and Installation 2.3.2 Power RequirementsTable 2-2 Power Requirements Hardware Preparation and Installation 2.4 Configuring the Board2.3.3 Equipment Requirements Hardware Preparation and Installation 2.5 Installing Accessories2.5.1 Rear Transition Module Hardware Preparation and Installation Installation Procedure2.5.2 PMC/XMC Support Hardware Preparation and Installation 2.6 Installing and Removing the BoardHardware Preparation and Installation Hardware Preparation and Installation 2.7 Completing the Installation3.1 Board Layout Controls, LEDs,and ConnectorsFigure 3-1 Component Layout ChapterFigure 3-2 Front Panel LEDs, Connectors and Switches Controls, LEDs, and Connectors3.2 Front Panel MVME2500 Installation and Use 6806800L01H3.3 LEDs 3.2.1 Reset Switch3.3.1 Front Panel LEDs Figure 3-3 Front Panel LEDsControls, LEDs, and Connectors Table 3-1 Front Panel LEDs3.3.2 Onboard LEDs 3.4 ConnectorsTable 3-2 Onboard LEDs Status Controls, LEDs, and ConnectorsTable 3-3 Front Panel Tri-Speed Ethernet Connector J1 3.4.1 Front Panel Connectors3.4.1.1 RJ45 with Integrated Magnetics J1 Controls, LEDs, and Connectors3.4.1.2 Front Panel Serial Port J4 Table 3-3 Front Panel Tri-Speed Ethernet Connector J1 continuedTable 3-4 Front Panel Serial Port J4 Controls, LEDs, and Connectors3.4.1.4 VMEBus P1 Connector 3.4.1.3 USB Connector J5Table 3-5 USB Connector J5 Table 3-6 VMEbus P1 ConnectorIRQ4 Table 3-6 VMEbus P1 Connector continuedControls, LEDs, and Connectors Controls, LEDs, and Connectors 3.4.1.5 VMEBus P2 ConnectorTable 3-7 VMEbus P2 Connector 3.4.2.1 Flash Program Connector P7 3.4.2 Onboard ConnectorsTable 3-7 VMEbus P2 Connector continued Table 3-8 Flash Programming Header P7Table 3-9 Custom SATA Connector J3 3.4.2.2 SATA Connector J3Table 3-8 Flash Programming Header P7 continued Controls, LEDs, and ConnectorsTable 3-9 Custom SATA Connector J3 continued 3.4.2.3 PMC ConnectorsTable 3-10 PMC J11 Connector Controls, LEDs, and ConnectorsControls, LEDs, and Connectors Table 3-10 PMC J11 Connector continuedTable 3-11 PMC J12 Connector Controls, LEDs, and Connectors Table 3-11 PMC J12 Connector continuedTable 3-12 PMC J13 Connector Controls, LEDs, and Connectors Table 3-12 PMC J13 Connector continuedTable 3-12 PMC J13 Connector continued Table 3-13 PMC J14 ConnectorControls, LEDs, and Connectors Table 3-13 PMC J14 Connector continued 3.4.2.4 JTAG Connector P6Table 3-14 JTAG Connector P6 Controls, LEDs, and ConnectorsControls, LEDs, and Connectors Table 3-14 JTAG Connector P6 continued3.4.2.6 SD Connector J2 3.4.2.5 COP Connector P6Table 3-16 SD Connector J2 Table 3-15 COP Header P10Table 3-16 SD Connector J2 continued 3.4.2.7 XMC Connector XJ2Table 3-17 XMC Connector XJ2 Pinout Controls, LEDs, and ConnectorsTable 3-17 XMC Connector XJ2 Pinout continued 3.4.2.8 Miscellaneous P2020 Debug ConnectorsTable 3-18 P20x0 Debug Header Controls, LEDs, and Connectors3.5.1 Geographical Address Switch S1 3.5 SwitchesTable 3-18 P20x0 Debug Header continued Controls, LEDs, and ConnectorsControls, LEDs, and Connectors Figure 3-5 Geographical Address SwitchTable 3-19 Geographical Address Switch Figure 3-6 SMT Configuration Switch Position 3.5.2 SMT Configuration Switch S2Table 3-20 Geographical Address Switch Settings Controls, LEDs, and ConnectorsControls, LEDs, and Connectors Table 3-20 Geographical Address Switch Settings continuedFigure 4-1 Block Diagram 4.1 Block DiagramFunctional Description 4.2 ChipsetFunctional Description 4.2.1 e500 Processor Core4.2.2 Integrated Memory Controller 4.2.4 Local Bus Controller LBC 4.2.3 PCI Express Interface4.2.5 Secure Digital Hub Controller SDHC 4.2.6 I2C Interface4.2.9 DMA Controller 4.2.8 DUART4.2.10 Enhanced Three-Speed Ethernet Controller eTSEC 4.2.11 General Purpose I/O GPIO4.2.14 P20x0 Hardware Configuration Pins 4.4 Timers4.3 System Memory 4.2.13 Common On-Chip Processor COP4.4.3 Watchdog Timer 4.4.2 Internal Timer4.4.4 FPGA Tick Timer 4.5 Ethernet Interfaces4.6.1 SPI Flash Memory 4.6 SPI Bus Interface4.6.2 SPI Flash Programming Functional DescriptionFunctional Description 4.6.3 Firmware RedundancyFunctional Description Figure 4-2 SPI Device Multiplexing LogicFunctional Description 4.6.4 Crisis Recovery4.7 Front UART Control Functional Description 4.8 Rear UART Control4.9 PMC/XMC Sites 4.9.1 PMC Add-on Card 4.10 SATA Interface4.9.2 XMC Add-on Card Functional Description4.12 USB 4.11 VME Support4.13 I2C Devices 4.11.1 Tsi148 VME Controller4.15 Power Management 4.14 Reset/Control FPGA4.15.1 Onboard Voltage Supply Requirement Table 4-1 Voltage Supply RequirementTable 4-1 Voltage Supply Requirement 4.15.2 Power Up Sequencing RequirementsFunctional Description Figure 4-3 Clock Distribution Diagram 4.17 Reset Structure4.16 Clock Structure Functional Description4.17.1 Reset Sequence 4.19 Real-Time Clock Battery4.18 Thermal Management Table 4-2 Thermal Interrupt ThresholdTable 4-3 POST Code Indicator on the LED 4.20.1 POST Code Indicator4.20 Debugging Support 4.20.2 JTAG Chain and Board4.21 Rear Transition Module RTM Table 4-4 Transition Module Features4.20.3 Custom Debugging Functional DescriptionFunctional Description MVME2500 Installation and Use 6806800L01H5.1 Overview Memory Maps and Registers5.2 Memory Map Table 5-1 Physical Address Map5.4 Linux Devices Memory Map 5.3 Flash Memory MapMemory Maps and Registers Table 5-2 Flash Memory MapMemory Maps and Registers Table 5-3 Linux Devices Memory Map5.5 Programmable Logic Device PLD Registers 8-bit field containing the current timer/register PLD revision. The5.5.1 PLD Revision Register 5.5.2 PLD Year Register5.5.4 PLD Day Register 5.5.3 PLD Month Register5.5.5 PLD Sequence Register Table 5-6 PLD Month RegisterTable 5-9 PLD Power Good Monitor Register 5.5.6 PLD Power Good Monitor Register1.2V Supply power good indicator 1.8V Supply power good indicatorTable 5-10 PLD LED Control Register 5.5.7 PLD LED Control RegisterLEDs Status on page Memory Maps and RegistersTable 5-11 PLD PCI/PMC/XMC Monitor Register 5.5.8 PLD PCI/PMC/XMC Monitor RegisterMemory Maps and Registers Field Description5.5.10 PLD Boot Bank Register 5.5.9 PLD U-Boot and TSI Monitor RegisterTable 5-12 PLD U-Boot and TSI Monitor Register Table 5-13 PLD Boot Bank RegisterBOOTBLOCKA Table 5-13 PLD Boot Bank RegisterBoot Block Manual Selector Switch Actual Boot BankTable 5-14 PLD Write Protect and I2C Debug Register 5.5.11 PLD Write Protect and I2C Debug RegisterMemory Maps and Registers Field DescriptionMemory Maps and Registers 5.5.13 PLD Test Register 5.5.12 PLD Test RegisterTable 5-15 PLD Test Register Table 5-16 PLD Test RegisterTable 5-17 PLD GPIO2 Interrupt Register 5.5.14 PLD GPIO2 Interrupt RegisterMemory Maps and Registers Field DescriptionTable 5-18 PLD Shutdown and Reset Control and Reset Reason Register 5.5.15 PLD Shutdown and Reset Control and Reset Reason RegisterAUTOSHDNMASK Automatic Shutdown MaskTable 5-19 PLD Watchdog Timer Refresh Register 5.5.16 PLD Watchdog Timer Refresh RegisterMemory Maps and Registers Field DescriptionTable 5-21 PLD Watchdog Timer Count Register 5.5.18 PLD Watchdog Timer Count Register5.5.17 PLD Watchdog Control Register Table 5-20 PLD Watchdog Control Register5.6.1 Prescaler Register 5.6 External Timer RegistersTable 5-22 Prescaler Register Memory Maps and RegistersMemory Maps and Registers 5.6.2 Control RegistersTable 5-23 Control Registers Table 5-24 Compare High Word Registers 5.6.3 Compare High and Low Word RegistersTable 5-25 Compare Low Word Registers Memory Maps and RegistersTable 5-26 Counter High Word Registers 5.6.4 Counter High and Low Word RegistersTable 5-27 Counter Low Word Registers Memory Maps and RegistersMemory Maps and Registers MVME2500 Installation and Use 6806800L01H6.2 Accessing U-Boot Boot System6.1 Overview Chapter6.3.1 Booting from a Network 6.3 Boot OptionsBoot System setenv netmask netmask6.3.3 Booting from a USB Drive 6.3.2 Booting from an Optional SATA Drive# option usb - interface, 01 - device 0 partition Boot System6.3.5 Booting VxWorks Through the Network 6.3.4 Booting from an SD Card# option mmc - interface, 01 - device 0 partition Boot SystemAnalyzing Kernel Log Files after a Kernel Panic 6.4 Using the Persistent Memory FeatureBoot System Boot System 6.5 MVME2500 Specific U-Boot CommandsTable 6-1 MVME2500 Specific U-Boot Commands Boot System Table 6-1 MVME2500 Specific U-Boot Commands continuedTable 6-1 MVME2500 Specific U-Boot Commands continued 6.6 Updating U-BootBoot System 4. Erase 0x90000 bytes starting at SPI address 0 sf erase 0 Boot SystemMVME2500 Installation and Use 6806800L01H Boot SystemTable 7-1 POR Configuration Settings 7.2 Reset ConfigurationProgramming Model 7.1 OverviewProgramming Model Table 7-1 POR Configuration Settings continuedmode either RTBI, RGMI Table 7-1 POR Configuration Settings continuedoperates using the RGMII Programming ModelProgramming Model Table 7-1 POR Configuration Settings continuedProgramming Model 7.3 Interrupt ControllerTable 7-2 MVME2500 Interrupt List 7.5 Ethernet PHY Address 7.4 I2C Bus Device AddressingTable 7-3 I2C Bus Device Addressing Table 7-4 PHY Types and MII Management Bus Address7.6.1 MRAM 7.6 Other Software Considerations7.6.2 Real Time Clock 7.6.3 Quad UARTTable 7-5 LBC Timing Parameters 7.6.4 LBC Timing ParametersProgramming Model Field DescriptionProgramming Model 7.7 Clock DistributionTable 7-6 Clock Distribution Table 7-6 Clock Distribution continued 7.7.1 System ClockTable 7-7 System Clock Programming ModelProgramming Model 7.7.2 Real Time Clock Input7.7.3 Local Bus Controller Clock Divisor Programming Model MVME2500 Installation and Use 6806800L01HA.1 Replacing the Battery Replacing the BatteryFigure A-1 Battery Location Appendix AReplacing the Battery Replacement Procedure Replacing the BatteryTo replace the battery, proceed as follows 1. Remove the old battery 2. Install the new battery with the plus sign + facing upMVME2500 Installation and Use 6806800L01H Replacing the BatteryTable B-1 Emerson Network Power - Embedded Computing Publications B.1 Emerson Network Power - Embedded Computing DocumentsRelated Documentation Appendix BTable B-3 Related Specifications B.3 Related SpecificationsB.2 Manufacturers’ Documents Related DocumentationPCI-X Protocol Addendum to the PCI Local Bus Specification PCI-X PT Table B-3 Related SpecificationsRelated Documentation IEEE Standard for a Common Mezzanine Card CMC Family IEEE StdRelated Documentation MVME2500 Installation and Use 6806800L01HEMC Results pending testing Safety NotesOperation InstallationSafety Notes Safety Notes Cabling and ConnectorsSafety Notes BatterySicherheitshinweise Sicherheitshinweise BetriebBeschädigung von Schaltkreisen InstallationSicherheitshinweise Batterie Kabel und SteckerSicherheitshinweise Bei Fragen wenden Sie sich an Ihren SystemverwalterSicherheitshinweise UmweltschutzSicherheitshinweise MVME2500 Installation and Use 6806800L01HIndex MVME2500 Installation and Use 6806800L01H IndexPage HOW TO REACH LITERATURE AND TECHNICAL SUPPORT